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TPD12S521

SLVS639F – OCTOBER 2007 – REVISED FEBRUARY 2016

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(1)

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating

conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.

7 Specifications

7.1 Absolute Maximum Ratings

(1) (2)

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

Supply voltage

–0.3

6

V

DC voltage at any channel input

–0.5

6

V

Storage temperature range

–65

150

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 500-V HBM is possible with the necessary precautions.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 250-V CDM is possible with the necessary precautions.

7.2 ESD Ratings

VALUE

UNIT

Electrostatic discharge

Human body model (HBM), per MIL-STD-

(1)

Pins 1, 2, 16–19, 37, 38

±2000

V

Pins 4, 7, 10, 13, 20–24,

27, 30, 33

±8000

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

TYP

MAX

UNIT

Operating free-air temperature

–40

85

°C

5V_SUPPLY

Operating supply voltage

5

5.5

V

LV_SUPPLY

Bias supply voltage

1

3.3

5.5

V

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.4 Thermal Information

TPD12S521

UNIT

DBT

38 PINS

Junction-to-ambient thermal resistance

83.6

°C/W

Junction-to-case (top) thermal resistance

29.8

Junction-to-board thermal resistance

44.7

Junction-to-top characterization parameter

2.9

Junction-to-board characterization parameter

44.1