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LNBH26LSPQR Datasheet(PDF) 9 Page - STMicroelectronics |
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LNBH26LSPQR Datasheet(HTML) 9 Page - STMicroelectronics |
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9 / 33 page  LNBH26LS Application information (valid for each section A/B) DocID025504 Rev 1 9/33 A, OLF-B). One bit is dedicated to the input voltage power not good function (PNG). Once the OTF bit (or OLF-A, OLF- B or PNG) has been activated (set to “1”), it is latched to “1” until the relevant cause is removed and a new register reading operation is performed. 2.7 Surge protection and TVS diodes Each LNBH26LS device section is directly connected to the antenna cable in a set-top box. Atmospheric phenomenon can cause high voltage discharges on the antenna cable causing damage to the attached devices. Surge pulses occur due to direct or indirect lightning strikes to an external (outdoor) circuit. This leads to currents or electromagnetic fields causing high voltage or current transients. Transient voltage suppressor (TVS) devices are usually placed, as shown in the following schematic, to protect each section of STB output circuits where the LNBH26LS and other devices are electrically connected to the antenna cable. Figure 4: Surge protection circuit For this purpose the use of LNBTVSxx surge protection diodes specifically designed by ST is recommended. The selection of the LNBTVS diode should be made based on the maximum peak power dissipation that the diode is capable of supporting (see the LNBTVS datasheet for further details). 2.8 Power-on I²C interface reset and undervoltage lockout The I²C interface built into the LNBH26LS is automatically reset at power-on. As long as the VCC stays below the undervoltage lockout (UVLO) threshold (4.7 V typ.), the interface does not respond to any I²C command and all data register bits are initialized to zeroes, therefore keeping the power blocks disabled. Once the VCC rises above 4.8 V typ., the I²C interface becomes operative and the DATA registers can be configured by the main microprocessor. 2.9 PNG: input voltage minimum detection When the input voltage (VCC pin) is lower than LPD (low power diagnostic) minimum thresholds, the PNG I²C bit is set to “1”. Refer to the Table 14: "I²C electrical characteristics" for threshold details. 2.10 COMP: boost capacitors and inductor The DC-DC converter compensation loop can be optimized in order to properly work with both ceramic and electrolytic capacitors (VUP pin). For this purpose, one I²C bit in the DATA 4 register (see COMP not found) can be set to “1” or “0” as follows: COMP = 0 for electrolytic capacitors COMP = 1 for ceramic capacitors GIPD1311131146LM |
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