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DP83867CRRGZR Datasheet(PDF) 5 Page - Texas Instruments |
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DP83867CRRGZR Datasheet(HTML) 5 Page - Texas Instruments |
5 / 130 page DP83867IR, DP83867CR www.ti.com SNLS484C – FEBRUARY 2015 – REVISED NOVEMBER 2015 Changes from Original (February 2015) to Revision A Page • Changed the document title From: "Robust, Low Power" To: "Robust, High Immunity" ....................................................... 1 • Changed the Features listed under "Highlights" .................................................................................................................... 1 • Changed the Applications list ................................................................................................................................................ 1 • Changed the Description text and layout .............................................................................................................................. 1 • Added TF fall time = 0.75 ns (Max) in RGMII Timing (4) ........................................................................................................ 18 • Added T4, MDI to GMII Latency = 264 ns (NOM) to GMII Receive Timing (6). .................................................................... 21 • Changed the title of Figure 21 From: Typical MDC/MDIO Read Operation To: Fast Link Drop Mechanism....................... 42 • Moved text From the end of Table 10 To PHY Identifier Register #1 (PHYIDR1) .............................................................. 58 • Changed format of loopback control bits in Table 30 "BIST Control Register (BISCR)" .................................................... 76 • Changed BIT NAME (11:8) From: "LED_ACT_SEL To: LED_2_SEL in Table 32 .............................................................. 79 • Changed BIT NAME (7:4) From: "LED_SPD_SEL To: LED_1_SEL in Table 32 ............................................................... 80 • Changed BIT NAME (3:0 From: "LED_LNK_SEL To: LED_0_SEL in Table 32 ................................................................. 80 • Changed the title of Table 43 From: Address 0x006FE To: Address 0x006F .................................................................... 88 • Deleted text "of the 64-QFP package" from the second paragraph in section Cable Line Driver...................................... 112 • Deleted text "for MII Mode" from the second paragraph in section Clock In (X_I) Recommendation ............................... 113 Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: DP83867IR DP83867CR |
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