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AMC1304L05 Datasheet(PDF) 11 Page - Texas Instruments |
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AMC1304L05 Datasheet(HTML) 11 Page - Texas Instruments |
11 / 39 page AMC1304L05, AMC1304L25, AMC1304M05, AMC1304M25 www.ti.com SBAS655C – SEPTEMBER 2014 – REVISED SEPTEMBER 2015 7.8 Regulatory Information VDE UL, cUL Recognized under UL1577 component recognition and CSA Certified according to DIN V VDE V 0884-10 component acceptance NO 5 programs File number: 40040142 File number: E181974 7.9 IEC Safety Limiting Values Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output (I/O) circuitry. A failure of the I/O circuitry can allow low resistance to ground or the supply and, without current limiting, dissipate sufficient power to overheat the die and damage the isolation barrier, potentially leading to secondary system failures. The safety-limiting constraint is the operating virtual junction temperature range specified in the Absolute Maximum Ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the application hardware determine the junction temperature. The assumed junction-to-air thermal resistance in the Thermal Information table is that of a device installed in the JESD51-7, High-K Test Board for Leaded Surface-Mount Packages. The power is the recommended maximum input voltage times the current. The junction temperature is then the ambient temperature plus the power times the junction-to-air thermal resistance. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT IS Safety input, output, or supply current θJA = 80.2°C/W, VI = 5.5 V, TJ = 150°C, TA = 25°C 90 mA TC Maximum case temperature 150 °C 7.10 IEC 61000-4-5 Ratings PARAMETER TEST CONDITIONS VALUE UNIT VIOSM Surge immunity 1.2-µs rise time and 50- μs fall time, voltage surge ±10000 V 7.11 Isolation Characteristics PARAMETER TEST CONDITIONS AMC1304 UNIT AC voltage (bipolar or unipolar) 1000 VRMS VIORM Maximum working insulation voltage DC voltage 1500 VDC t = 1 s (100% production test), VPD(t) Partial discharge test voltage 3977 VPEAK partial discharge < 5 pC t = 60 s (qualification test) 7000 VIOTM Transient overvoltage VPEAK t = 1 s (100% production test) 8400 RIO Isolation resistance VIO = 500 V >109 Ω 7.12 Package Characteristics (1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT L(I01) Minimum air gap (clearance) Shortest pin to pin distance through air 8 mm Minimum external tracking Shortest pin-to-pin distance across the package L(I02) 8 mm (creepage) surface Tracking resistance IEC: DIN EN 60112 (VDE 0303-11) and UL: CTI 600 V (comparative tracking index) ASTM D3638-12 Minimum internal gap Distance through the double insulation 0.027 mm (internal clearance) (2 × 0.0135 mm) PD Pollution degree 2 Degrees Barrier capacitance input to CIO VIN = 0.8 VPP at 1 MHz 1.2 pF output (1) Creepage and clearance requirements must be applied according to the specific equipment isolation standards of a specific application. Care must be taken to maintain the creepage and clearance distance of the board design to ensure that the mounting pads of the isolator on the printed circuit board (PCB) do not reduce this distance. Creepage and clearance on a PCB become equal according to the measurement techniques described in the Isolation Glossary section. Techniques such as inserting grooves or ribs on the PCB are used to help increase these specifications. Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: AMC1304L05 AMC1304L25 AMC1304M05 AMC1304M25 |
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