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ADC128D818CIMT Datasheet(PDF) 9 Page - Texas Instruments |
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ADC128D818CIMT Datasheet(HTML) 9 Page - Texas Instruments |
9 / 46 page ADC128D818 www.ti.com SNAS483F – FEBRUARY 2010 – REVISED AUGUST 2015 7.6 AC Electrical Characteristics The following specifications apply for +3.0 VDC ≤ V + ≤ +5.5 V DC , unless otherwise specified. All limits TA = TJ = 25°C unless otherwise specified. PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT SERIAL BUS TIMING CHARACTERISTICS t1 SCL (Clock) Period TA = TJ = TMIN to TMAX 2.5 100 µs t2 Data In Set-up Time to SCL High TA = TJ = TMIN to TMAX 100 ns t3 Data Out Stable After SCL Low TA = TJ = TMIN to TMAX 0 ns t4 SDA Low Set-up Time to SCL Low TA = TJ = TMIN to TMAX 100 ns (start) t5 SDA High Hold Time After SCL High TA = TJ = TMIN to TMAX 100 ns (stop) SCL or SDA time low for I2C bus TA = TJ = TMIN to TMAX 25 35 ms tTIME-OUT reset (1) Limits are ensured to AOQL (Average Outgoing Quality Level). (2) Typicals are at TJ = TA = 25°C and represent most likely parametric normal. Figure 1. Serial Bus Timing Diagram Copyright © 2010–2015, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: ADC128D818 |
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