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ADC12D1000CIUT Datasheet(PDF) 10 Page - Texas Instruments |
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ADC12D1000CIUT Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 86 page  ADC12D1000, ADC12D1600 SNAS480N – MAY 2010 – REVISED AUGUST 2015 www.ti.com Pin Functions: Power and Ground Balls PIN I/O EQUIVALENT CIRCUIT DESCRIPTION NAME NO. A1, A7, B2, B7, D4, D5, E4, K1, L1, GND — NONE Ground Return for the Analog circuitry. T4, U4, U5, W2, W7, Y1, Y7, H8:N13 A13, A17, A20, D13, D16, E17, F17, F20, GNDDR — NONE Ground Return for the Output Drivers. M17, M20, U13, U17, V18, Y13, Y17, Y20 A9, B8, C9, GNDE — NONE Ground Return for the Digital Encoder. V9, W8, Y9 F2, G2, H3, J2, K4, L4, Ground Return for the Track-and-Hold and Clock GNDTC — NONE M2, N3, P2, circuitry. R2, T2, T3, U1 A2, A6, B6, C6, D8, D9, Power Supply for the Analog circuitry. This supply E1, F1, H4, VA — NONE is tied to the ESD ring. Therefore, it must be N4, R1, T1, powered up before or with any other supply. U8, U9, W6, Y2, Y6 Bias Voltage I-channel. This is an externally decoupled bias voltage for the I-channel. Each pin VbiasI J4, K2 — NONE should individually be decoupled with a 100-nF capacitor through a low-resistance, low-inductance path to GND. Bias Voltage Q-channel. This is an externally decoupled bias voltage for the Q-channel. Each pin VbiasQ L2, M4 — NONE should individually be decoupled with a 100-nF capacitor through a low-resistance, low-inductance path to GND. A11, A15, C18, D11, D15, D17, J17, VDR J20, R17, R20, — NONE Power Supply for the Output Drivers. T17, U11, U15, U16, Y11, Y15 A8, B9, C8, VE — NONE Power Supply for the Digital Encoder. V8, W9, Y8 G1, G3, G4, H2, J3, K3, L3, Power Supply for the Track-and-Hold and Clock VTC M3, N2, P1, — NONE circuitry. P3, P4, R3, R4 10 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: ADC12D1000 ADC12D1600 |
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