Electronic Components Datasheet Search |
|
ADS1115-Q1 Datasheet(PDF) 11 Page - Texas Instruments |
|
ADS1115-Q1 Datasheet(HTML) 11 Page - Texas Instruments |
11 / 39 page 16-Bit Σ ADC I C Interface 2 Voltage Reference Oscillator ALERT/RDY SCL SDA ADDR Gain = 2/3, 1, 2, 4, 8, or 16 PGA Comparator ADS1115-Q1 AIN1 AIN2 GND AIN0 AIN3 VDD MUX ADS1115-Q1 www.ti.com SBAS563B – DECEMBER 2011 – REVISED DECEMBER 2015 7 Detailed Description 7.1 Overview The ADS1115-Q1 device is a small, low-power, 16-bit, delta-sigma ( ΔΣ) analog-to-digital converter (ADC). The ADS1115-Q1 device is easy to configure and design into a wide variety of applications, and allows precise measurements to be obtained with very little effort. The ADS1115-Q1 device consists of a ΔΣ ADC core with adjustable gain, an internal voltage reference, a clock oscillator, and an I2C interface. An additional feature available on the ADS1115-Q1 device is a programmable digital comparator that provides an alert on a dedicated pin. All of these features are intended to reduce required external circuitry and improve performance. The ADS1115-Q1 ADC core measures a differential signal, VIN, that is the difference between AINP and AINN. A MUX is available on the ADS1115-Q1 device to route the four input channels to AINP and AINN. This architecture results in a strong attenuation in any common-mode signals. The converter core consists of a differential, switched-capacitor ΔΣ modulator followed by a digital filter. Input signals are compared to the internal voltage reference. The digital filter receives a high-speed bitstream from the modulator and outputs a code proportional to the input voltage. The ADS1115-Q1 device has two available conversion modes: single-shot mode and continuous conversion mode. In single-shot mode, the ADC performs one conversion of the input signal upon request and stores the value to an internal result register. The device then enters a low-power shutdown mode. This mode is intended to provide significant power savings in systems that only require periodic conversions or when there are long idle periods between conversions. In continuous conversion mode, the ADC automatically begins a conversion of the input signal as soon as the previous conversion is completed. The rate of continuous conversion is equal to the programmed data rate. Data can be read at any time and always reflect the most recent completed conversion. 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Multiplexer The ADS1115-Q1 device contains an input multiplexer, as shown in Figure 22. Either four single-ended or two differential signals can be measured. Additionally, AIN0 and AIN1 can be measured differentially to AIN3. The multiplexer is configured by three bits in the Config register (see the Config Register section). When the single- ended signals are measured, the negative input of the ADC is internally connected to GND by a switch within the multiplexer. Copyright © 2011–2015, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: ADS1115-Q1 |
Similar Part No. - ADS1115-Q1_16 |
|
Similar Description - ADS1115-Q1_16 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |