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Hardware Overview

2

Hardware Overview

The TUSB4020B EVM board hardware can be divided into six functional areas:

2.1

TUSB4020BPHP

The TUSB4020B EVM (U2 on the schematic) operates as a functional interconnect between an upstream

connection to a USB host or hub and up to two directly connected downstream devices or hubs. More

devices and hubs can be supported if arranged in tiers. The TUSB4020B is capable of supporting

operation at High-Speed (HS), Full Speed (FS) or Low Speed (LS). In general, the speed of the upstream

connection of the TUSB4020B EVM limits the downstream connections to that speed (HS and FS) or

lower.

The TUSB4020B requires a 24-MHz low ESR crystal, Y1 with a 1-M

Ω feedback resistor. The crystal

should be fundamental mode with a load capacitance of 12 pF – 24 pF and a frequency stability rating of

±100 PPM or better. To ensure a proper startup oscillation condition, a maximum crystal equivalent series

resistance (ESR) of 50

Ω is recommended.

The TUSB4020B can also use an oscillator or other clock source. When using an external clock source

such as an oscillator, the reference clock should have ±100 PPM (or better) frequency stability and have

less than 50-ps absolute peak-to-peak jitter (or less) than 25-ps peak-to-peak jitter after applying the USB

3.0 jitter transfer function.

2.2

USB Port Connectors

VBUS is received from the upstream host or hub on J3. The TUSB4020B is configured as a self-powered

hub, so there is not any significant current draw by the EVM from VBUS. The TUSB4020B does monitor

the VBUS input after filtering through a resistor divider network of a 90.9-k

Ω, 1% resistor, R9, and a 10-

k

Ω, 1% resistor, R10. VBUS cannot be directly connected to the TUSB4020B device. A bulk capacitor of

at least 1

μF is required on the upstream port VBUS input to comply with the USB specification. The

TUSB4020BEVM uses a 10-

μF capacitor, C8.

VBUS, sourced by the 5-V wall power input, J5, is provided to the downstream port connectors. The USB

2.0 specification limits the current consumption of a USB 2.0 device to 500 mA at 5 V. The current limiting

parameter of the TPS2561 device, U3, is configured to 2.2 A to avoid any spurious overcurrent events due

to bus-powered HDD spin-up power fluctuations or unnecessary limiting during USB charging. A

production implementation could place stricter limits on this power consumption. An overcurrent event on

any of the downstream port connectors will be reported to the TUSB4020B via the OVERCURxZ inputs.

2.2.1

USB Port Connector – Noise Filtering

Each downstream VBUS output has a 150-

μF bulk capacitor (C49, C51) as recommended by the

TPS2561 data manual (SLVS930) to prevent in-rush current events on the downstream devices. In

addition, there are ferrite beads and small capacitors on the VBUS lines to reduce noise and address

ESD/EMI concerns.

The TUSB4020BEVM also implements optional isolation using two small noise filtering capacitors and a 1-

M

Ω resistor between the earth ground of each connector and the digital ground of the EVM, this is not a

requirement but should be used if ground isolation is desired.

2.3

Optional Serial EEPROM

Each TUSB4020BEVM is equipped with an onboard EEPROM/socket placeholder, U1. A small I2C

EEPROM can be installed to set the configuration registers as defined in the TUSB4020B data manual. In

its default setting, the EVM does not have an EEPROM installed and instead uses the configuration inputs

to determine any optional settings of the TUSB4020B.

The EEPROM interface defaults to programmable (not write-protected) so that any installed EEPROM’s

contents may be modified to test various settings. If an EEPROM data change is required, the values may

be changed using the register access methods outlined in the TUSB4020B data sheet (#NUM#). In

3

SLLU219 – June 2015

TUSB4020BPHP Evaluation Module

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