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DLP9500UVFLN Datasheet(PDF) 7 Page - Texas Instruments |
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DLP9500UVFLN Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 54 page  DLP9500UV www.ti.com DLPS033B – NOVEMBER 2014 – REVISED JUNE 2015 Pin Functions (continued) PIN (1) TYPE DATA INTERNAL TRACE SIGNAL CLOCK DESCRIPTION (I/O/P) RATE (2) TERM(3) (MILS) NAME NO. Differentially D_CP(6) D20 Input LVCMOS DDR DCLK_C 195.09 terminated – 100 Ω Differentially D_CP(7) H22 Input LVCMOS DDR DCLK_C 104.86 terminated – 100 Ω Differentially D_CP(8) B28 Input LVCMOS DDR DCLK_C 451.41 terminated – 100 Ω Differentially D_CP(9) F26 Input LVCMOS DDR DCLK_C 294.22 terminated – 100 Ω Differentially D_CP(10) C27 Input LVCMOS DDR DCLK_C 429.68 terminated – 100 Ω Input data bus C (2x LVDS) Differentially D_CP(11) G29 Input LVCMOS DDR DCLK_C 314.98 terminated – 100 Ω Differentially D_CP(12) D28 Input LVCMOS DDR DCLK_C 276.04 terminated – 100 Ω Differentially D_CP(13) H26 Input LVCMOS DDR DCLK_C 186.25 terminated – 100 Ω Differentially D_CP(14) E27 Input LVCMOS DDR DCLK_C 312.07 terminated – 100 Ω Differentially D_CP(15) J27 Input LVCMOS DDR DCLK_C 262.94 terminated – 100 Ω DATA BUS D Differentially D_DN(0) AK14 Input LVCMOS DDR DCLK_D 492.53 terminated – 100 Ω Differentially D_DN(1) AG15 Input LVCMOS DDR DCLK_D 342.78 terminated – 100 Ω Differentially D_DN(2) AL17 Input LVCMOS DDR DCLK_D 491.83 terminated – 100 Ω Differentially D_DN(3) AE21 Input LVCMOS DDR DCLK_D 74.24 terminated – 100 Ω Differentially D_DN(4) AK20 Input LVCMOS DDR DCLK_D 356.23 terminated – 100 Ω Differentially D_DN(5) AF20 Input LVCMOS DDR DCLK_D 163.07 terminated – 100 Ω Input data bus D (2x LVDS) Differentially D_DN(6) AH22 Input LVCMOS DDR DCLK_D 204.16 terminated – 100 Ω Differentially D_DN(7) AE23 Input LVCMOS DDR DCLK_D 105.59 terminated – 100 Ω Differentially D_DN(8) AK26 Input LVCMOS DDR DCLK_D 450.51 terminated – 100 Ω Differentially D_DN(9) AF28 Input LVCMOS DDR DCLK_D 302.04 terminated – 100 Ω Differentially D_DN(10) AJ29 Input LVCMOS DDR DCLK_D 429.8 terminated – 100 Ω Differentially D_DN(11) AE27 Input LVCMOS DDR DCLK_D 298.87 terminated – 100 Ω Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: DLP9500UV |
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