SI53322 datasheet(1/22 Pages) SILABS

Part #	SI53322

Description	1:2 LOW JITTER LVPECL CLOCK BUFFER

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Manufacturer	SILABS [Silicon Laboratories]

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Rev. 1.0 7/15

Si53322

1:2 LOW JITTER LVPECL CLOCK BUFFER (>1.25 GH Z)

Features

Applications

Description

The Si53322 is an ultra-low-jitter two-output LVPECL buffer. Utilizing

Silicon Laboratories’ advanced fan-out clock technology, the Si53322

guarantees low additive jitter, low skew, and low propagation delay

variability from dc to 1250 MHz.

The Si53322 features minimal cross-talk and excellent supply noise

rejection, simplifying low-jitter clock distribution in noisy environments.

Functional Block Diagram

 2 LVPECL outputs

 Ultra-low additive jitter: 55 fs rms

 Wide frequency range: dc to

1250 MHz

 Universal input stage accepts

differential or LVCMOS clock



VDD: 2.5 / 3.3 V

 Small size: 16-QFN (3 mm x

3mm)

 RoHS compliant, Pb-free

 Industrial temperature range:

–40 to +85 °C

 High-speed clock distribution

 Ethernet switch/router

 Optical Transport Network (OTN)

 SONET/SDH

 PCI Express Gen 1/2/3

 Storage

 Telecom

 Industrial

 Servers

 Backplane clock distribution

Q0

Q1

VDD

Power

Supply

Filtering

CLK

Patents pending

Ordering Information:

See page 17.

Pin Assignments

EXPOSED

GND

PAD

9

11

10

12

4

2

3

1

NC

Q1

Q0

GND

NC

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SI53322 Datasheet(PDF) 1 Page - Silicon Laboratories

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