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AN892 Datasheet(PDF) 6 Page - Silicon Laboratories |
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AN892 Datasheet(HTML) 6 Page - Silicon Laboratories |
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6 / 16 page  AN892 6 Rev. 0.1 2.6. Diode and Output Capacitor Current flows through D1 only during the (1–D)TSW portion of the steady state cycle. During the DTSW portion of the cycle, lLOAD is sourced solely by the output capacitor C10. Output voltage ripple on C10 can be calculated by Equation 21. Applying the charge balance of C10, Equation 22. Equation 23. When D1 is reversed biased, it must withstand Equation 24. VOUT RIPPLE ILOADDTSW C10 -------------------------------- = I – LOADDTSW 1D – T SW + 0 = ID1 AVE 1D – ILOAD 1 1D – ------------------ = VD1 REV D VIN 1D – NV OUT + = |
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