AP22800

Document number: DS36046 Rev. 3 - 2

11 of 14

www.diodes.com

January 2015

© Diodes Incorporated

AP22800

Board Layout and Thermal Considerations

Due to the high current capacity of the load switch, PCB layout needs to ensure good thermal distribution during operation. The top and bottom of

AP22800EV1, the evaluation board for the AP22800, can be seen below.

Figure 1. PCB Copper Layout & Silk Screen

– Top

Figure 2. PCB Copper Layout & Silk Screen

– Bottom

Thermal vias are used directly underneath the chip to help distribute the heat from the device. The ground plane on the underside of the board

effectively acts as a large heatsink. The widths of the tracks carrying VIN and VOUT are kept wide. Vias are also distributed around the board to

aid thermal conduction and to ensure a consistent potential, particularly around the ground connections of the capacitors. All capacitors used are

located as close as possible to the AP22800 to minimize any parasitic effects.

The maximum junction temperature of the AP22800 is +125°C. To ensure that this is not exceeded, the following equation can be used to give an

approximation of junction temperature. Temperature readings taken with a thermal camera can also give a good approximation of power

dissipation with the use of this equation. The board layout has a major influence on the parameter

.

where,

= Junction temperature (°C)

= Ambient temperature (°C)

= Junction to ambient thermal impedance (°C/W)

= Power dissipation (voltage drop across device

output current) (W)