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EFM32TG108F4-QFN24 Datasheet(PDF) 6 Page - Silicon Laboratories |
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EFM32TG108F4-QFN24 Datasheet(HTML) 6 Page - Silicon Laboratories |
6 / 48 page ...the world's most energy friendly microcontrollers 2015-03-06 - EFM32TG108FXX - d0032_Rev1.40 6 www.silabs.com 2.1.19 Voltage Comparator (VCMP) The Voltage Supply Comparator is used to monitor the supply voltage from software. An interrupt can be generated when the supply falls below or rises above a programmable threshold. Response time and thereby also the current consumption can be configured by altering the current supply to the comparator. 2.1.20 Low Energy Sensor Interface (LESENSE) The Low Energy Sensor Interface (LESENSE), is a highly configurable sensor interface with support for up to 4 individually configurable sensors. By controlling the analog comparators, LESENSE is capable of supporting a wide range of sensors and measurement schemes, and can for instance measure resistive and capacitive sensors. LESENSE also includes a programmable FSM which enables simple processing of measurement results without CPU intervention. LESENSE is available in energy mode EM2, in addi- tion to EM0 and EM1, making it ideal for sensor monitoring in applications with a strict energy budget. 2.1.21 General Purpose Input/Output (GPIO) In the EFM32TG108, there are 17 General Purpose Input/Output (GPIO) pins, which are divided into ports with up to 16 pins each. These pins can individually be configured as either an output or input. More advanced configurations like open-drain, filtering and drive strength can also be configured individually for the pins. The GPIO pins can also be overridden by peripheral pin connections, like Timer PWM outputs or USART communication, which can be routed to several locations on the device. The GPIO supports up to 11 asynchronous external pin interrupts, which enables interrupts from any pin on the device. Also, the input value of a pin can be routed through the Peripheral Reflex System to other peripherals. 2.2 Configuration Summary The features of the EFM32TG108 is a subset of the feature set described in the EFM32TG Reference Manual. Table 2.1 (p. 6) describes device specific implementation of the features. Table 2.1. Configuration Summary Module Configuration Pin Connections Cortex-M3 Full configuration NA DBG Full configuration DBG_SWCLK, DBG_SWDIO, DBG_SWO MSC Full configuration NA DMA Full configuration NA RMU Full configuration NA EMU Full configuration NA CMU Full configuration CMU_OUT0, CMU_OUT1 WDOG Full configuration NA PRS Full configuration NA I2C0 Full configuration I2C0_SDA, I2C0_SCL USART1 Full configuration with I2S US1_TX, US1_RX, US1_CLK, US1_CS LEUART0 Full configuration LEU0_TX, LEU0_RX TIMER0 Full configuration TIM0_CC[2:0] TIMER1 Full configuration TIM1_CC[2:0] RTC Full configuration NA |
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