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EFM32LG880F64G-E-QFP100 Datasheet(PDF) 3 Page - Silicon Laboratories

Part # EFM32LG880F64G-E-QFP100
Description  Output state retention and wake-up from Shutoff Mode
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

EFM32LG880F64G-E-QFP100 Datasheet(HTML) 3 Page - Silicon Laboratories

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...the world's most energy friendly microcontrollers
2014-06-13 - EFM32LG880FXX - d0117_Rev1.30
3
www.silabs.com
2 System Summary
2.1 System Introduction
The EFM32 MCUs are the world’s most energy friendly microcontrollers. With a unique combination of
the powerful 32-bit ARM Cortex-M3, innovative low energy techniques, short wake-up time from ener-
gy saving modes, and a wide selection of peripherals, the EFM32LG microcontroller is well suited for
any battery operated application as well as other systems requiring high performance and low-energy
consumption. This section gives a short introduction to each of the modules in general terms and also
shows a summary of the configuration for the EFM32LG880 devices. For a complete feature set and in-
depth information on the modules, the reader is referred to the EFM32LG Reference Manual.
A block diagram of the EFM32LG880 is shown in Figure 2.1 (p. 3) .
Figure 2.1. Block Diagram
Clock Managem ent
Energy Managem ent
Serial Int erfaces
I/ O Port s
Core and Mem ory
Tim ers and Triggers
Analog Int erfaces
Securit y
32- bit bus
Peripheral Reflex Syst em
ARM Cort ex- M3 processor
Flash
Program
Mem ory
LESENSE
High Freq
RC
Oscillat or
High Freq.
Cryst al
Oscillat or
Tim er/
Count er
Low Energy
Tim er
Pulse
Count er
Real Tim e
Count er
Low Freq.
Cryst al
Oscillat or
Low Freq.
RC
Oscillat or
Wat chdog
Tim er
RAM
Mem ory
Ex t . Bus
Int erface
General
Purpose
I/ O
Mem ory
Prot ect ion
Unit
DMA
Cont roller
Debug
Int erface
w/ ETM
Ex t ernal
Int errupt s
Pin
Reset
Hardware
AES
LG880F64/ 128/ 256
LCD
Cont roller
ADC
DAC
Analog
Com parat or
Operat ional
Am plifier
USART
Low
Energy
UART
I 2C
UART
Power- on
Reset
Volt age
Regulat or
Back- up
Power
Dom ain
Volt age
Com parat or
Brown- out
Det ect or
TFT
Driver
Back- up
RTC
Pin
Wakeup
Ult ra Low Freq.
RC
Oscillat or
Aux High Freq.
RC
Oscillat or
2.1.1 ARM Cortex-M3 Core
The ARM Cortex-M3 includes a 32-bit RISC processor which can achieve as much as 1.25 Dhrystone
MIPS/MHz. A Memory Protection Unit with support for up to 8 memory segments is included, as well
as a Wake-up Interrupt Controller handling interrupts triggered while the CPU is asleep. The EFM32
implementation of the Cortex-M3 is described in detail in EFM32 Cortex-M3 Reference Manual.
2.1.2 Debug Interface (DBG)
This device includes hardware debug support through a 2-pin serial-wire debug interface and an Embed-
ded Trace Module (ETM) for data/instruction tracing. In addition there is also a 1-wire Serial Wire Viewer
pin which can be used to output profiling information, data trace and software-generated messages.
2.1.3 Memory System Controller (MSC)
The Memory System Controller (MSC) is the program memory unit of the EFM32LG microcontroller. The
flash memory is readable and writable from both the Cortex-M3 and DMA. The flash memory is divided


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