TPA3140D2

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SLOS882A – JANUARY 2015 – REVISED APRIL 2015

10 Detailed Description

10.1 Overview

To facilitate system design, the TPA3140D2 needs only a single power supply between 4.5 V and 14.4 V for

operation. An internal voltage regulator provides suitable voltage levels for the gate driver, digital and low-voltage

analog circuitry. Additionally, all circuitry requiring a floating voltage supply, that is, the high-side gate drive, is

accommodated by built-in bootstrap circuitry with integrated boot strap diodes requiring only an external

capacitor for each half-bridge.

The audio signal path, including the gate drive and output stage is designed as identical, independent full-

bridges. Special attention should be paid to placing all decoupling capacitors as close to their associated pins as

possible. In general, the physical loop with the power supply pins, decoupling capacitors and GND return path to

the device pins must be kept as short as possible and with as little area as possible to minimize induction (see

reference board documentation for additional information).

For a properly functioning bootstrap circuit, a small ceramic capacitor must be connected from each bootstrap pin

(BSXX) to the power-stage output pin (OUTXX). When the power-stage output is low, the bootstrap capacitor is

charged through an internal diode connected between the gate-drive power-supply pin (GVDD) and the bootstrap

pins. When the power-stage output is high, the bootstrap capacitor potential is shifted above the output potential

and thus provides a suitable voltage supply for the high-side gate driver. In an application with PWM switching

frequencies in the range from 310 kHz, it is recommended to use ceramic capacitors with at least 220-nF

capacitance, size 0603 or 0805, for the bootstrap supply. These capacitors ensure sufficient energy storage,

even during clipped low frequency audio signals, to keep the high-side power stage FET (LDMOS) fully turned on

during the remaining part of its ON cycle.

Special attention should be paid to the power-stage power supply; this includes component selection, PCB

placement, and routing. For optimal electrical performance, EMI compliance, and system reliability, it is important

that each PVCC pin is decoupled with ceramic capacitors placed as close as possible to each supply pin. It is

recommended to follow the PCB layout of the TPA3140D2 reference design. For additional information on

recommended power supply and required components, see the application diagrams in this data sheet.

The PVCC power supply should have low output impedance and low noise. The power-supply ramp and SD

release sequence is not critical for device reliability as facilitated by the internal power-on-reset circuit, but it is

recommended to release SD after the power supply is settled for minimum turn on audible artifacts.

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