54AC138

1-of-8 Decoder/Demultiplexer

General Description

The

’AC/’ACT138

is

a

high-speed

1-of-8

decoder/

demultiplexer. This device is ideally suited for high-speed bi-

polar memory chip select address decoding. The multiple in-

put enables allow parallel expansion to a 1-of-24 decoder

using just three ’AC/’ACT138 devices or a 1-of-32 decoder

using four ’AC/’ACT138 devices and one inverter.

Features

n Demultiplexing capability

n Multiple input enable for easy expansion

n Active LOW mutually exclusive outputs

n Outputs source/sink 24 mA

n ’ACT138 has TTL-compatible inputs

n Standard Microcircuit Drawing (SMD)

— ’AC138: 5962-87622

— ’ACT138: 5962-87554

Logic Symbols

Pin Names

Description

A

Address Inputs

E

Enable Inputs

E

3

Enable Input

O

Outputs

Connection Diagrams

DS100268-1

IEEE/IEC

DS100268-7

Pin Assignment

for DIP and Flatpak

DS100268-2

Pin Assignment

for LCC

DS100268-3

August 1998

© 1998 National Semiconductor Corporation

DS100268

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