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LMP7704MT Datasheet(PDF) 3 Page - Texas Instruments |
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LMP7704MT Datasheet(HTML) 3 Page - Texas Instruments |
3 / 44 page V + 1 2 3 4 5 6 7 8 N/C -IN +IN V - OUTPUT N/C N/C + - OUT V - IN+ V + IN- + - 1 2 3 5 4 LMP7701, LMP7702, LMP7704 www.ti.com SNOSAI9I – SEPTEMBER 2005 – REVISED NOVEMBER 2015 5 Description (continued) The LMP770x each have a rail-to-rail input stage that significantly reduces the CMRR glitch commonly associated with rail-to-rail input amplifiers. This is achieved by trimming both sides of the complimentary input stage, thereby reducing the difference between the NMOS and PMOS offsets. The output of the LMP770x swings within 40 mV of either rail to maximize the signal dynamic range in applications requiring low supply voltage. The LMP7701 is offered in the space-saving 5-Pin SOT-23 and 8-Pin SOIC package. The LMP7702 is offered in the 8-Pin SOIC and 8-Pin VSSOP package. The quad LMP7704 is offered in the 14-Pin SOIC and 14-Pin TSSOP package. These small packages are ideal solutions for area constrained PC boards and portable electronics. 6 Pin Configuration and Functions LMP7701 DBV Package LMP7701 D Package 5-Pin SOT-23 8-Pin SOIC Top View Top View Pin Functions - LMP7701 PIN I/O DESCRIPTION NAME SOT-23 SOIC IN+ 3 3 I Noninverting Input IN– 4 2 I Inverting Input IN A + — — I Noninverting Input for Amplifier A IN A– — — I Inverting Input for Amplifier A IN B+ — — I Noninverting Input for Amplifier B IN B– — — I Inverting Input for Amplifier B IN C+ — — I Noninverting Input for Amplifier C IN C– — — I Inverting Input for Amplifier C IN D+ — — I Noninverting Input for Amplifier D IN D– — — I Inverting Input for Amplifier D NC — 1, 5, 8 — No connection OUT 1 6 O Output OUT A — — O Output for Amplifier A OUT B — — O Output for Amplifier B OUT C — — O Output for Amplifier C OUT D — — O Output for Amplifier D V+ 5 7 P Positive Supply V– 2 4 P Negative Supply Copyright © 2005–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LMP7701 LMP7702 LMP7704 |
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