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P87C52IFFFA Datasheet(PDF) 11 Page - NXP Semiconductors |
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P87C52IFFFA Datasheet(HTML) 11 Page - NXP Semiconductors |
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11 / 62 page  Philips Semiconductors Product specification 80C32/87C52 CMOS single-chip 8-bit microcontrollers 1996 Aug 16 11 Interrupts The 80C32/87C52 has 6 interrupt sources. All except TF2 and EXF2 are identical sources to those in the 80C51. The Interrupt Enable Register and the Interrupt Priority Register are modified to include the additional 80C32/87C52 interrupt sources. The operation of these registers is identical to the 80C51. In the 80C32/87C52, the Timer 2 Interrupt is generated by the logical OR of TF2 and EXF2. Neither of these flags is cleared by hardware when the service routine is vectored to. In fact, the service routine may have to determine whether it was TF2 or EXF2 that generated the interrupt, and the bit will have to be cleared in software. All of the bits that generate interrupts can be set or cleared by software, with the same result as though it has been set or cleared by hardware. That is, interrupts can be generated or pending interrupts can be canceled in software. The interrupt vector addresses and the interrupt priority for requests in the same priority level are given in the following: Source Vector Priority Within Address Level 1. IE0 0003H (highest) 2. TF0 000BH 3. IE1 0013H 4. TF1 001BH 5. RI + TI 0023H 6. TF2 + EXF2 002BH (lowest) Note that they are identical to those in the 80C51 except for the addition of the Timer 2 (TF1 and EXF2) interrupt at 002BH and at the lowest priority within a level. Table 3. Timer 2 as a Timer MODE T2CON INTERNAL CONTROL (Note 1) EXTERNAL CONTROL (Note 2) 16-bit Auto-Reload 00H 08H 16-bit Capture 01H 09H Baud rate generator receive and transmit same baud rate 34H 36H Receive only 24H 26H Transmit only 14H 16H Table 4. Timer 2 as a Counter MODE TMOD INTERNAL CONTROL (Note 1) EXTERNAL CONTROL (Note 2) 16-bit 02H 0AH Auto-Reload 03H 0BH NOTES: 1. Capture/reload occurs only on timer/counter overflow. 2. Capture/reload occurs on timer/counter overflow and a 1-to-0 transition on T2EX (P1.1) pin except when timer 2 is used in the baud rate generator mode. |
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