GRM1555C1H9R0DZ01D datasheet(8/27 Pages) IDT

Part #	GRM1555C1H9R0DZ01D

Description	Matched Broadband RF VGA

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Manufacturer	IDT [Integrated Device Technology]

Direct Link	http://www.idt.com

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8 / 27 page

Matched Broadband RF VGA

400MHz to 2700MHz

Glitch-Free

TM, Zero-DistortionTM, RF VGA

8

Rev 3, April 2015

IDTF0480NBGI

Datasheet

SERIAL CONTROL MODE

Data is clocked in LSB first via serial mode. Note the timing diagram below.

Note –

The IDTF0480 includes a CLK inhibit feature designed to minimize sensitivity to CLK bus noise

when the device is not being programmed. When CSb is high (> VIH), the CLK input is disabled and serial

data (DATA) is not clocked into the shift register. It is recommended that CSb be pulled high (>VIH) when

the device is not being programmed.

SERIAL REGISTER TIMING DIAGRAM: (Note the Timing Spec Intervals in Blue)

SERIAL MODE DEFAULT CONDITION:

When the device is first powered up it will default to the Maximum Attenuation setting as described below:

Figure 1 - SPI timing diagram & default register settings

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