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Z86C95 DSP

CPS DC-4067-13

GENERAL DESCRIPTION

The Z86C95 MCU (Microcontroller Unit ) introduces a new

level of sophistication to Superintegration™ ICs. The

family incorporating a CMOS ROMless Z8 microcontroller

with an embedded DSP processor for digital servo control.

The DSP slave processor can perform 16-bit x 16-bit

multiplicates and accumulates in one clock cycle. Addi-

tionally, the Z86C95 is further enhanced with a hardwired

16-bitx16-bit multiplier and a 32-bit/16-bit divider, three

16-bit counter timers with capture and compare registers,

a half flash 8-channel 8-bit A/D converter with a 2

µsec

conversion time, an 8-bit DAC with 1/4 programmable gain

stage, UART, serial peripheral interface, and a PWM

output channel (Functional Block Diagram). It is fabricated

using CMOS technology and offered in an 80-pin QFP, 84-

pin PLCC, or 100-pin VQFP package.

The Z86C95 provides up to 16 output address lines thus

permitting an address space of up to 64 Kbytes of data and

program memory each. Eight address outputs (AD7-AD0)

are provided by a multiplexed, 8-bit, Address/Data bus.

The remaining 8 bits are provided via output address bits

A15-A8.

DC-4067-13

(5-17-94)

There are 256 registers located on chip and organized as

236 general-purpose registers, 16 control and status reg-

isters, and four I/O port registers. The register file can be

divided into sixteen groups of 16 working registers each.

Configuration of the registers in this manner allows the use

of short format instructions; in addition, any of the indi-

vidual registers can be accessed directly. Also, the Z86C95

contains 512 bytes of DSP Program RAM and 128 words

of DSP data RAM.

Notes:

All Signals with a preceding front slash, "/", are active Low, e.g.:

B//W (WORD is active Low); /B/W (BYTE is active Low, only).

Power connections follow conventional descriptions below:

Connection

Circuit

Device

Power

V

CC

V

DD

Ground

GND

V

SS

OPERATING ERRATA

Z86C95

This notice only applies to devices top marked "Z86C9524

ASC/FSC/VSC" with a date code of 9237 or later.

1.

A DSP load to the DAC Register fails below approxi-

mately V

2.

Clipping occurs in the linearity of the DAC with a 100K

load at about 3.3V output (VDHI = 3.5V).

3.

I

then will jump to 40-70 mA, and will settle between 17-

24 mA. Settling time is about 10-15 seconds.

4.

I

of 1-2 mA, then will jump to 5-7 mA, and will settle at 3-

4 mA. Settling time is about 10-15 seconds.

The following operating errata only applies to devices

topmarked with "Z86C95 ASC/FSC/VSC."

1.

ICC1 at HALT Mode will show a current of 17-18 mA,

then will jump to 40-70 mA, and will settle between 17-

24 mA. Settling time is about 10-15 seconds.

2.

ICC2 at STOP Mode and DSP Pause will show a

current of 1-2 mA, then will jump to 5-7 mA, and will

settle at 3-4 mA. Settling time is about 10-15 seconds.

The following operating errata only applies to devices

topmarked with "Z86C9540 ASC/FSC/VSC or SL 1636."

1.

ICC1 at HALT Mode will show a current of 17-18 mA,

then will jump to 40-70 mA, and will settle between 17-

24 mA. Settling time is about 10-15 seconds.