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OPA836IDBVR Datasheet(PDF) 8 Page - Texas Instruments |
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OPA836IDBVR Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 57 page  OPA836, OPA2836 SLOS712G – JANUARY 2011 – REVISED OCTOBER 2015 www.ti.com Electrical Characteristics: VS = 2.7 V (continued) Test conditions unless otherwise noted: VS+ = +2.7 V, VS– = 0 V, VOUT = 1 VPP, RF = 0 Ω, RL = 2 kΩ, G = 1 V/V, input and output referenced to mid-supply, VIN_CM = mid-supply – 0.5 V. TA = 25°C, unless otherwise noted. TEST PARAMETER TEST CONDITIONS MIN TYP MAX UNIT LEVEL(1) AC PERFORMANCE (continued) Current noise 1/f corner frequency 31.7 kHz C Overdrive recovery time, over/under Overdrive = 0.5 V 55/60 ns C Closed-loop output impedance f = 100 kHz 0.02 Ω C Channel-to-channel crosstalk (OPA2836) f = 10 kHz –120 dB C DC PERFORMANCE Open-loop voltage gain (AOL) 100 125 dB A TA = 25°C –400 ±65 400 A TA = 0°C to 70°C –680 680 Input referred offset voltage µV TA = –40°C to 85°C –760 760 B TA = –40°C to 125°C –1060 1060 TA = 0°C to 70°C –6.2 ±1 6.2 Input offset voltage drift(2) TA = –40°C to 85°C –6 ±1 6 µV/°C B TA = –40°C to 125°C –6.6 ±1.1 6.6 TA = 25°C 300 650 1000 A TA = 0°C to 70°C 190 1400 Input bias current(3) nA TA = –40°C to 85°C 120 1500 B TA = –40°C to 125°C 120 1800 TA = 0°C to 70°C –2 ±0.33 2 Input bias current drift(2) TA = –40°C to 85°C –1.9 ±0.32 1.9 nA/°C B TA = –40°C to 125°C –2.1 ±0.37 2.1 TA = 25°C –180 ±30 180 A TA = 0°C to 70°C –200 ±30 200 Input offset current nA TA = –40°C to 85°C –215 ±30 215 B TA = –40°C to 125°C –240 ±30 240 TA = 0°C to 70°C –460 ±77 460 Input offset current drift(2) TA = –40°C to 85°C –575 ±95 575 pA/°C B TA = –40°C to 125°C –600 ±100 600 INPUT TA = 25°C, –0.2 0 V A <3-dB degradation in CMRR limit Common-mode input range low TA = –40°C to 125°C, –0.2 0 V B <3-dB degradation in CMRR limit TA = 25°C, 1.5 1.6 V A <3-dB degradation in CMRR limit Common-mode input range high TA = –40°C to 125°C, 1.5 1.6 V B <3-dB degradation in CMRR limit TA = 25°C, –0.3 to Input linear operating voltage range V C <6-dB degradation in THD 1.75 Common-mode rejection ratio 91 114 dB A Input impedance common mode 200 || 1.2 k Ω || pF C Input impedance differential mode 200 || 1 k Ω || pF C (2) Input Offset Voltage Drift, Input Bias Current Drift, and Input Offset Current Drift are average values calculated by taking data at the end points, computing the difference, and dividing by the temperature range. (3) Current is considered positive out of the pin. 8 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated Product Folder Links: OPA836 OPA2836 |
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