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MN103SFN4G Datasheet(PDF) 8 Page - Panasonic Semiconductor |
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MN103SFN4G Datasheet(HTML) 8 Page - Panasonic Semiconductor |
8 / 16 page Ver. DEM MN103SJ7/N0/N1/N2/N4/N5/N6 Series 8 Features (continued) Serial 2 (Full duplex UART / Synchronous serial interface) Synchronous serial interface Overrun error detection Transfer clock source 1/2, 1/4, 1/16 and 1/64 of timer 0 underflow, 1/2, 1/4, 1/16 and 1/64 of timer 1 underflow, 1/2, 1/4, 1/16 and 1/64 of timer 2 underflow, 1/2, 1/4, 1/16 and 1/64 of timer 3 underflow, IOCLK/2, IOCLK/4, SBT2 pin Can be selected as the first bit to be transferred, Any transfer size from 2 to 8 bits can be selected. Continuous transmission, reception and transmission / reception Maximum transfer rate: 5.0 Mbps Corresponding to the 4 channel system communication and the SPI communication Full duplex UART Parity check, Overrun and flaming error detection Transfer clock source 1/16, 1/32, 1/64, 1/128, 1/256, 1/512 and 1/1024 of timer 0 underflow, 1/16, 1/32, 1/64, 1/128, 1/256, 1/512 and 1/1024 of timer 1 underflow, 1/16, 1/32, 1/64, 1/128, 1/256, 1/512 and 1/1024 of timer 2 underflow, 1/16, 1/32, 1/64, 1/128, 1/256, 1/512 and 1/1024 of timer 3 underflow, IOCLK/16, IOCLK/32, IOCLK/64 Can be selected as the first bit to be transferred, Any transfer size from 7 to 8 bits can be selected. Continuous transmission, reception and transmission / reception Maximum transfer rate: 300 kbps Regulator Incorporates regulator, and use of 5 V power supply is possible Power Supply Detection Detection level 3.6 V to 4.3 V When power supply voltage is under detection level, reset is generated. |
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Similar Description - MN103SFN4G |
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