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SBT1B Datasheet(PDF) 2 Page - Panasonic Semiconductor |
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SBT1B Datasheet(HTML) 2 Page - Panasonic Semiconductor |
2 / 30 page MN101EF93G 8-bit Single-chip Microcontroller Publication date: February 2015 2 PubNo. 21693-013E 1.2 Hardware Functions Feature - Memory Capacity: ROM 128 KB RAM 6 KB - Package: 80-Pin LQFP (14 mm 14 mm / 0.65 mm pitch, halogen free) Panasonic "halogen free" semiconductor products refer to the products made of molding resin and interposer which conform to the following standards. - Bromine : 900 ppm (Maximum Concentration Value) - Chlorine : 900 ppm (Maximum Concentration Value) - Bromine + Chlorine : 1500 ppm (Maximum Concentration Value) The above-mentioned standards are based on the numerical value described in IEC61249-2-21. Antimony and its compounds are not added intentionally. - Machine Cycle: High-speed mode 0.05 s / 20 MHz (4.0 V to 5.5 V) Low-speed mode 62.5 s / 32 kHz (4.0 V to 5.5 V) - Oscillation circuit: 3 channel oscillation circuit Internal oscillation (frc): 16 MHz Crystal/ceramic (fosc): Maximum 10 MHz Crystal/ceramic (fx): Maximum 32.768 kHz -Clock Multiplication circuit (PLL Circuit) PLL circuit output clock (fpll): fosc multiplied by 2, 3, 4, 5, 6, 8, 10, 1/2 frc multiplication by 4, 5 enable -Clock Gear for System Clock System Clock (fs): fpll divided by 1, 2, 4, 16, 32, 64, 128 -Clock Gear for control clock of peripheral function Control clock of peripheral function (fpll-div): stop or fpll divided by 1, 2, 4, 8, 16 - Memory Bank: Expands data memory space by the bank system (by 64 KB, 16 banks) Source address bank / Destination address bank - Operation Mode: NORMAL mode (High-speed mode) SLOW mode (Low-speed mode) HALT mode STOP mode (The operation clock can be switched in each mode.) |
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