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MN101EFA6 Datasheet(PDF) 2 Page - Panasonic Semiconductor

Part # MN101EFA6
Description  8-bit Single-chip Microcontroller
Download  33 Pages
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Manufacturer  PANASONIC [Panasonic Semiconductor]
Direct Link  http://www.panasonic.com/industrial/
Logo PANASONIC - Panasonic Semiconductor

MN101EFA6 Datasheet(HTML) 2 Page - Panasonic Semiconductor

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MN101EFA6/A5/A1/A0 Series
8-bit Single-chip Microcontroller
Publication date: November 2014
2
PubNo. 216A6-012E
1.2
Hardware Functions
 Feature
- ROM capacity: 32 KB
- RAM capacity: 1 KB
- Package:
MN101EFA6/A1
44-Pin QFP (10 mm
 10 mm / 0.8 mm pitch)
48-Pin TQFP (7 mm
 7 mm / 0.5 mm pitch)
MN101EFA5/A0
32-Pin TQFP (7 mm
 7 mm / 0.8mm pitch)
32-Pin SSOP (6.1 mm
 11 mm / 0.65mm pitch, halogen free)
Panasonic "halogen free" semiconductor products refer to the products made of molding resin and
interposer which conform to the following standards.
- Bromine : 900 ppm (Maximum Concentration Value)
- Chlorine : 900 ppm (Maximum Concentration Value)
- Bromine + Chlorine : 1500 ppm (Maximum Concentration Value)
The above-mentioned standards are based on the numerical value described in IEC61249-2-21.
Antimony and its compounds are not added intentionally.
- Machine Cycle:
0.05
s / fs: 20 MHz (4.0 V to 5.5 V)
- Oscillation circuit: 2 channel oscillation circuit
Internal oscillation (frc): 16 MHz
Crystal/ceramic (fosc): Maximum 10 MHz
-Clock Multiplication circuit (PLL Circuit)
PLL circuit output clock (fpll): fosc multiplied by 2, 3, 4, 5, 6, 8, 10,
1/2
 frc multiplication by 4, 5 enable
-Clock Gear for System Clock
System Clock (fs): fpll divided by 1, 2, 4, 16, 32, 64, 128
-Clock Gear for control clock of peripheral function
Control clock of peripheral function (fpll-div): stop or fpll divided by 1, 2, 4, 8, 16
- Operation Mode:
NORMAL mode
HALT mode
STOP mode
(The operation clock can be switched in each mode.)
- Operating Voltage: 4.0 V to 5.5 V


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