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Z8018110FEC Datasheet(PDF) 10 Page - Zilog, Inc. |
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Z8018110FEC Datasheet(HTML) 10 Page - Zilog, Inc. |
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10 / 74 page  2-10 Z80181 SMART ACCESS CONTROLLER SAC™ Zilog DS971800500 SYSTEM CONTROL SIGNALS Pin Name Pin Number Input/Output, Tri-State Function ST 3 Out, Active 1 Status. This signal is used with the /M1 and /HALT output to decode the status of the CPU machine cycle. Note that the /M1 output is affected by the status of the M1E bit in the OMCR register. The following table shows the status while M1E=1. ST /HALT /M1 Operation 0 1 0 CPU Operation (1st Opcode fetch) 1 1 0 CPU Operation (2nd and 3rd Opcode fetch) 1 1 1 CPU Operation (MC other than Opcode fetch) 0 X 1 DMA operation 0 0 0 HALT mode 1 0 1 SLEEP mode (Incl. System STOP mode) |
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