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100351 Datasheet(PDF) 1 Page - National Semiconductor (TI) |
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100351 Datasheet(HTML) 1 Page - National Semiconductor (TI) |
1 / 8 page 100351 Low Power Hex D Flip-Flop General Description The 100351 contains six D-type edge-triggered, master/ slave flip-flops with true and complement outputs, a pair of common Clock inputs (CP a and CPb) and common Master Reset (MR) input. Data enters a master when both CP a and CP b are LOW and transfers to the slave when CPa and CPb (or both) go HIGH. The MR input overrides all other inputs and makes the Q outputs LOW. All inputs have 50 k Ω pull-down resistors. Features n 40% power reduction of the 100151 n 2000V ESD protection n Pin/function compatible with 100151 n Voltage compensated operating range: −4.2V to −5.7V n Standard Microcircuit Drawing (SMD) 5962-9457901 Logic Symbol Pin Names Description D 0–D5 Data Inputs CP a,CPb Common Clock Inputs MR Asynchronous Master Reset Input Q 0–Q5 Data Outputs Q 0–Q5 Complementary Data Outputs DS100318-11 August 1998 © 1998 National Semiconductor Corporation DS100318 www.national.com |
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