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ASM3P2187AG-08TT Datasheet(PDF) 2 Page - ON Semiconductor |
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ASM3P2187AG-08TT Datasheet(HTML) 2 Page - ON Semiconductor |
2 / 6 page ASM3P2187A, ASM3P2187B http://onsemi.com 2 Figure 1. Block Diagram Crystal Oscillator XOUT CLKIN / XIN VDD PLL VCO ModOUT REFOUT SEL SSON/PDB Output Divider Loop Filter Phase Detector Frequency Divider Feedback Divider Modulation Table 1. PIN DESCRIPTION Pin# Pin Name Type Description 1 CLKIN / XIN I External reference Clock input or Crystal connection. 2 XOUT O Crystal connection. If using an external reference, this pin must be left unconnected. 3 SSON / PDB (Note 1) I Modulation enable pin/ Power down pin. Has an Internal pull up resistor. 4 SEL I Modulation rate setting pin Centre spread, SEL = “L”: Frequency Deviation ±0.5% Centre spread, SEL = “H”: Frequency Deviation ±1.0% Has an Internal pull up resistor. 5 REFOUT O Non−modulated clock output pin. The Frequency is same as input frequency. This pin becomes to “L” at power−down. 6 VSS P Ground Connection. Connect to system ground. 7 ModOUT O Modulated clock output pin This pin becomes to “L” at power−down. 8 VDD P Power Supply Voltage Pin. Connect to +3.3 V. 1. SSON Pin is available in ASM3P2187A Device and PDB Pin is available in ASM3P2187B Device. Table 2. MODULATION ENABLE SETTING SSON Modulation L No Modulation H Modulation Table 3. POWER DOWN STATUS PDB Status L Power Down Status H Operating Status Table 4. SPREAD RANGE SELECTION SEL Deviation @ 15 MHz L ±0.50% H ±1.00% |
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