PARAGON GA3224

http://onsemi.com

4

Parameter

Units

Max

Typ

Min

Conditions

Symbol

SDA INPUT

Logic 0 Voltage

−

(Note 2)

0

−

0.3

V

Logic 1 Voltage

−

(Note 2)

1

−

1.3

V

SDA OUTPUT

Standby Pull Up Current

−

−

1.4

2

2.6

mA

Sync Pull Up Current

−

−

450

500

550

mA

Logic 0 Current (Pull Down)

−

−

225

250

275

mA

Logic 1 Current (Pull Up)

−

−

225

250

275

mA

Synchronization Time

(Synchronization Pulse Width)

Baud = 0

237

250

263

ms

Baud = 1

118

125

132

Baud = 2

59

62.5

66

Baud = 3

29.76

31.25

32.81

Baud = 4

14.88

15.63

16.41

Baud = 5

7.44

7.81

8.20

Baud = 6

3.72

3.91

4.10

Baud = 7

1.86

1.95

2.05

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

1. Total System Gain consists of: Wideband System Gain + High and Low Independent Channel Gains + Converter Gain.

Total System Gain is calibrated during Cal/Config process.

2. Sample tested.

Support Software

Paragon GA3224 is fully supported ON Semiconductor’s software tools available from ARKonline

® website

http://ark.onsemi.com/.

TYPICAL APPLICATIONS

Figure 2. Test Circuit

3k9

1k

LP FILTER

OUT

200k

T

GA3224

INTERFACE

VC

A/D

CHANNEL 2

EEPROM

Σ

REGULATOR

A/D

A/D

D/A

HBRIDGE

205n

60n

13n

70n

10

8

6

7

411

12

13

1

2

9

5

All resistors in ohms, all capacitors in farads unless otherwise stated.

3

CHANNEL 1