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BELASIGNA250 Datasheet(PDF) 4 Page - ON Semiconductor |
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BELASIGNA250 Datasheet(HTML) 4 Page - ON Semiconductor |
4 / 30 page BELASIGNA 250 http://onsemi.com 4 Table 2. ELECTRICAL SPECIFICATIONS (continued) Description Screened Units Max Typ Min Conditions Symbol POWER−ON−RESET (POR) POR hysteresis PORHYSTERESIS 10 16 22 mV POR duration TPOR 5 10 15 ms INPUT STAGE Analog input voltage VIN 0 − 2 V Preamplifier gain tolerance PAG 1 kHz −1.5 − 1.5 dB √ Preamplifier gain mismatch be- tween channels 1 kHz −1 − 1 dB Input impedance RIN 0 dB preamplifer gain − 250 − k W Non−zero preamplifier gains 400 550 700 k W √ Input referred noise INIRN Unweighted, 20 Hz to 8 kHz BW Preamplifier setting: 0 dB 12 dB 15 dB 18 dB 21 dB 24 dB 27 dB 30 dB − − − − − − − − 40 12 8 6 4.5 4 3.5 3 55 14 11 8 5.5 5 4.5 4 mVrms Input dynamic range INDR 1 kHz, 20 Hz to 8 kHz BW Preamplifier setting: 0 dB 12 dB 15 dB 18 dB 21 dB 24 dB 27 dB 30 dB 85 84 84 83 82 81 80 78 88 87 87 86 85 84 83 81 − − − − − − − − dB Input peak THD+N (Note 4) INTHDN Any valid preamplifier gain, 1 kHz − −63 −60 dB √ Input stage delay (Note 5) − 200 − ms DIRECT DIGITAL OUTPUT Maximum load current IDO Normal mode − − 13 mA High power mode − − 25 mA Output impedance RDO Normal mode − 9 11 W High power mode − 5 6 W Output dynamic range DODR Unweighted, 100 Hz to 8 kHz BW, mono 90 93 − dB Output THD+N DOTHDN Unweighted, 100 Hz to 22 kHz BW, mono −79 −76 dB Output voltage DOVOUT −Vbat Vbat V ANALOG OUTPUT STAGE Analog output voltage VOUT 0 − 2 V 3. Audio performance will be degraded below 1.05 V. 4. Measured with a = 12 dB input signal. 5. Input stage delay is inversely proportional to sampling frequency. 6. Max voltage should be limited to 2.2 V peak regardless of VDDC. Protection diodes will be enabled above this voltage. |
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