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SM8212 Datasheet(PDF) 7 Page - Nippon Precision Circuits Inc |
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SM8212 Datasheet(HTML) 7 Page - Nippon Precision Circuits Inc |
7 / 32 page NIPPON PRECISION CIRCUITS-7 SM8212B Sync Code Part 1 Batch Frame Part 01 23 4 56 7 1 Code Word Sync Code Part SC SC 7 0 Sync Code Word 1 32 Address bits Function bits Check bits Message bits 12 19 20 21 22 31 32 0 1 Even-parity bit Even-parity bit Check bits Address signal Message signal 1 Frame (= 2 Code Words) Preamble 1st Batch 2nd Batch Frame No. Continuous 575-bit "1, 0" bit pattern Sync Code Sync Code Figure 1. Receive signal format Bit number Bit value Bit number Bit value Bit number Bit value Bit number Bit value 1091 17 0 25 1 2 1 10 1 18 0 26 1 3 1 11 0 19 0 27 0 4 1 12 1 20 1 28 1 5 1 13 0 21 0 29 1 6 1 14 0 22 1 30 0 7 0 15 1 23 0 31 0 8 0 16 0 24 1 32 0 Table 1. Sync code format FUNCTIONAL DESCRIPTION 1. Receive Format The sync signal is a continuous code word in the received signal, used for word synchronization. It comprises 31 bits in an M-series bit pattern plus one even-parity bit, making a 32-bit signal. The sync code word pattern is shown in table 1. (1) Sync signal (SC) Unless otherwise specified, values in diagrams without parentheses are for 512 bps, in ( ) are for 1200 bps, and in [ ] are for 2400 bps. “M” represents the value of PL5 (MSB) to PL0 (LSB), and “N” represents the value of RF5 (MSB) to RF0 (LSB). The receive format conforms to CCIR RPC No. 1 (POCSAG). |
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