NiCd/NiMH Battery

Fast-Charge Controllers

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3

ELECTRICAL CHARACTERISTICS (continued)

TIMING CHARACTERISTICS

Note 3: Ratio of actual versus expected timeout (see Table 4). Tested with TM1 = TM2 = floating.

(Note 3)

CCMD, DCMD

CONDITIONS

kHz

100

MOD Switching Frequency

0.84

1.00

1.16

µs

1.0

Minimum Pulse Width

Variation of Fast-Charge Timeout

UNITS

MIN

TYP

MAX

SYMBOL

PARAMETER

CCMD, DCMD,

CCMD, DCMD, DVEN

CCMD, DCMD, DVEN

For DIS, TEMP and CHG,

0mA

0mA

µA

-1.0

1.0

Input Logic Leakage

1.0

Input Logic Voltage High

µA

-70.0

Input Logic Current High

µA

70.0

Input Logic Current Low

V

Logic-High Threshold

TM1, TM2 = tri-state

BAT, MCV, TCO, SNS, TS

µA

-2.0

2.0

Input Logic Current High-Z

M

Ω

50

Input Impedance

TM1, TM2

V

TM1, TM2

V

0.3

Input Logic Voltage Low

ms

200

250

300

Battery Replacement Timeout

(Note 4)

Note 1: The sense trip levels are determined by an internal resistor divider network that provides a typical difference of 30mV from

SNSHI to SNSLO. Slight variation in this delta is seen if there is a resistor mismatch in the network.

Note 2: Typical variations of Negative Delta Voltage and Thermistor Input Resolution parameters are less than ±4mV.

For DIS, TEMP and CHG,

0mA

0mA

V

0.5

Logic-Low Threshold

CONDITIONS

UNITS

MIN

TYP

MAX

SYMBOL

PARAMETER