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LMT85DCKT Datasheet(PDF) 6 Page - Texas Instruments |
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LMT85DCKT Datasheet(HTML) 6 Page - Texas Instruments |
6 / 26 page LMT85, LMT85-Q1 SNIS168C – MARCH 2013 – REVISED OCTOBER 2015 www.ti.com 7.5 Thermal Information (1) LMT85/ LMT85 LMT85-Q1 THERMAL METRIC(2) UNIT DCK LP 5 PIN 3 PIN RθJA Junction-to-ambient thermal resistance (3)(4) 275 167 RθJC(top) Junction-to-case (top) thermal resistance 84 90 RθJB Junction-to-board thermal resistance 56 146 °C/W ψJT Junction-to-top characterization parameter 1.2 35 ψJB Junction-to-board characterization parameter 55 146 (1) For information on self-heating and thermal response time see section Mounting and Thermal Conductivity. (2) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. (3) The junction to ambient thermal resistance, RθJA, is specified without a heat sink in still air. (4) Changes in output due to self heating can be computed by multiplying the internal dissipation by the thermal resistance. 7.6 Accuracy Characteristics These limits do not include DC load regulation. These stated accuracy limits are with reference to the values in Table 1. PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX (1) UNIT TA = TJ= 20°C to 150°C; VDD = 1.8 V to 5.5 V -2.7 ±0.4 2.7 °C TA = TJ= 0°C to 150°C; VDD = 1.9 V to 5.5 V -2.7 ±0.7 2.7 °C Temperature accuracy (3) TA = TJ= 0°C to 150°C; VDD = 2.6 V to 5.5 V ±0.3 °C TA = TJ= –50°C to 0°C; VDD = 2.3 V to 5.5 V -2.7 ±0.7 2.7 °C TA = TJ= –50°C to 0°C; VDD = 2.9 V to 5.5 V ±0.25 °C (1) Limits are specific to TI's AOQL (Average Outgoing Quality Level). (2) Typicals are at TJ = TA = 25°C and represent most likely parametric norm. (3) Accuracy is defined as the error between the measured and reference output voltages, tabulated in the Transfer Table at the specified conditions of supply gain setting, voltage, and temperature (expressed in °C). Accuracy limits include line regulation within the specified conditions. Accuracy limits do not include load regulation; they assume no DC load. 7.7 Electrical Characteristics Unless otherwise noted, these specifications apply for VDD = +1.8V to +5.5V. MIN and MAX limits apply for TA = TJ = TMIN to TMAX, unless otherwise noted; typical values apply for TA = TJ = 25°C. PARAMETER TEST CONDITIONS MIN (1) TYP (2) MAX (1) UNIT Average sensor gain (output -30°C and 90°C used to calculate average sensor gain –8.2 mV/°C transfer function slope) Source ≤ 50 μA, (VDD - VOUT) ≥ 200 mV –1 –0.22 mV Load regulation (3) Sink ≤ 50 μA, VOUT ≥ 200 mV 0.26 1 mV Line regulation (4) 200 μV/V IS TA = TJ = 30°C to 150°C, (VDD - VOUT) ≥ 100 mV 5.4 8.1 μA Supply current TA = TJ = -50°C to 150°C, (VDD - VOUT) ≥ 100 mV 5.4 9 μA CL Output load capacitance 1100 pF Power-on time (5) CL= 0 pF to 1100 pF 0.7 1.9 ms Output drive TA = TJ = 25°C –50 +50 µA (1) Limits are specific to TI's AOQL (Average Outgoing Quality Level). (2) Typicals are at TJ = TA = 25°C and represent most likely parametric norm. (3) Source currents are flowing out of the LMT85/LMT85-Q1. Sink currents are flowing into the LMT85/LMT85-Q1. (4) Line regulation (DC) is calculated by subtracting the output voltage at the highest supply voltage from the output voltage at the lowest supply voltage. The typical DC line regulation specification does not include the output voltage shift discussed in Output Voltage Shift. (5) Specified by design and characterization. 6 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated |
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