LMT84DCKR datasheet(5/26 Pages) TI

Part #	LMT84DCKR

Description	1.5V, SC70/TO-92,Analog Temperature Sensors with Class-AB Output

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Manufacturer	TI [Texas Instruments]

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LMT84, LMT84-Q1

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SNIS167C – MARCH 2013 – REVISED OCTOBER 2015

7.3 ESD Ratings - Automotive

VALUE

UNIT

Human-body model (HBM), per JESD22-A114, all

±2500

pins. (1) Applies for SC70 package LMT84DCK-Q1.

V(ESD)

Electrostatic discharge

V

Charged-device model (CDM), per JEDEC

specification JESD22-C101, all pins. (2) Applies for

±1000

SC70 package LMT84DCK-Q1.

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.4 Recommended Operating Conditions

MIN

MAX

UNIT

Specified Temperature Range:

TMIN ≤ TA ≤ TMAX

°C

−50 ≤ TA ≤ 150

°C

Supply Voltage Range (VDD)

1.5

5.5

V

7.5 Thermal Information

(1)

LMT84/

LMT84

LMT84-Q1

THERMAL METRIC(2)

UNIT

DCK

LP

5 PINS

3 PINS

RθJA

Junction-to-ambient thermal resistance (3)(4)

275

167

RθJC(top)

Junction-to-case (top) thermal resistance

84

90

RθJB

Junction-to-board thermal resistance

56

146

°C/W

ψJT

Junction-to-top characterization parameter

1.2

35

ψJB

Junction-to-board characterization parameter

55

146

(1)

For information on self-heating and thermal response time see section Mounting and Thermal Conductivity.

(2)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(3)

The junction to ambient thermal resistance (RθJA) under natural convection is obtained in a simulation on a JEDEC-standard, High K

board as specified in JESD51-7, in an environment described in JESD51-2. Exposed pad packages assume that thermal vias are

included in the PCB, per JESD 51-5.

(4)

Changes in output due to self heating can be computed by multiplying the internal dissipation by the thermal resistance.

7.6 Accuracy Characteristics

These limits do not include DC load regulation. These stated accuracy limits are with reference to the values in Table 1.

PARAMETER

TEST CONDITIONS

MIN(1)

TYP(2)

MAX(1)

UNIT

70°C to 150°C; VDD = 1.5 V to 5.5 V

-2.7

±0.6

2.7

°C

0°C to 70°C; VDD = 1.5 V to 5.5 V

-2.7

±0.9

2.7

°C

Temperature Accuracy

(3)

–50°C to 0°C; VDD = 1.6 V to 5.5 V

-2.7

±0.9

2.7

°C

–50°C to 150°C; VDD = 2.3 V to 5.5 V

±0.4

°C

(1)

Limits are specified to TI's AOQL (Average Outgoing Quality Level).

(2)

Typicals are at TJ = TA = 25°C and represent most likely parametric norm.

(3)

Accuracy is defined as the error between the measured and reference output voltages, tabulated in the Transfer Table at the specified

conditions of supply gain setting, voltage, and temperature (expressed in °C). Accuracy limits include line regulation within the specified

conditions. Accuracy limits do not include load regulation; they assume no DC load.

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