IC61C256AH

Integrated Circuit Solution Inc.

5

AHSR010-0D 4/19/2002

AC TEST LOADS

Figure 1.

Figure 2.

AC TEST CONDITIONS

Parameter

Unit

Input Pulse Level

0V to 3.0V

Input Rise and Fall Times

3 ns

Input and Output Timing

1.5V

and Reference Levels

Output Load

See Figures 1 and 2

480

Ω

30 pF

Including

jig and

scope

255

Ω

OUTPUT

5V

480

Ω

5 pF

Including

jig and

scope

255

Ω

OUTPUT

5V

-10

-12

-15

-20

-25

Symbol Parameter

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Unit

Read Cycle Time

10

—

12

—

15

—

20

—

25

—

ns

—

10

—

12

—

15

—

20

—

25

ns

Output Hold Time

2

—

2

—

2

—

2

—

2

—

ns

CE Access Time

—

10

—

12

—

15

—

20

—

25

ns

OE Access Time

—

5

—

5

—

7

—

8

—

9

ns

0

—

0

—

0

—

0

—

0

—

ns

—

5

—

6

—

7

—

9

—

10

ns

2

—

3

—

3

—

3

—

3

—

ns

—

5

—

7

—

8

—

9

—

10

ns

CE to Power-Up

0

—

0

—

0

—

0

—

0

—

ns

—

10

—

12

—

15

—

18

—

20

ns

Notes:

1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V

and output loading specified in Figure 1.

2. Tested with the load in Figure 2. Transition is measured ±200 mV from steady-state voltage. Not 100% tested.

3. Not 100% tested.