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HM62256A Datasheet(PDF) 6 Page - Hitachi Semiconductor

Part No. HM62256A
Description  32,768-word x 8-bit High Speed CMOS Static RAM
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Maker  HITACHI [Hitachi Semiconductor]
Homepage  http://www.renesas.com/eng
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 6 page
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• Input pulse levels: 0.8 V to 2.4 V
• Input and output timing refernce levels: 1.5 V
• Input rise and fall times: 5 ns
• Output load: 1 TTL Gate + CL (100 pF)
(Including scope & jig)
AC Characteristics (Ta = 0 to +70°C, VCC = 5 V ± 10%, unless otherwise noted.)
Test Conditions
Read Cycle
HM62256A-8
HM62256A-10
HM62256A-12
HM62256A-15
—————– —————– —————– —————–
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Min
Max
Unit
Note
———————————————————————————————————————————————–
Read cycle time
tRC
85
100
120
150
ns
———————————————————————————————————————————————–
Address access time
tAA
85
100
120
150
ns
———————————————————————————————————————————————–
Chip select
tACS
85
100
120
150
ns
access time
———————————————————————————————————————————————–
Output enable to
tOE
45
50
60
70
ns
output valid
———————————————————————————————————————————————–
Chip selection to
tCLZ
10
10
10
10
ns
2
output in low-Z
———————————————————————————————————————————————–
Output enable to
tOLZ
5—
5—
5—
5—
ns
2
output in low-Z
———————————————————————————————————————————————–
Chip deselection to
tCHZ
0
30
0
35
0
40
0
50
ns
1, 2
output in high-Z
———————————————————————————————————————————————–
Output disable to
tOHZ
0
30
0
35
0
40
0
50
ns
1, 2
output in high-Z
———————————————————————————————————————————————–
Output hold from
tOH
5
10
10
10
ns
address change
———————————————————————————————————————————————–
6
HM62256A Series
HM62256A Series




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