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UCC27536 Datasheet(PDF) 7 Page - Texas Instruments

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Part # UCC27536
Description  2.5-A and 5-A, 35-VMAX VDD FET and IGBT Single-Gate Driver
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

UCC27536 Datasheet(HTML) 7 Page - Texas Instruments

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UCC27531, UCC27533, UCC27536, UCC27537, UCC27538
www.ti.com
SLUSBA7F – DECEMBER 2012 – REVISED JULY 2015
8.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
Supply voltage, VDD
10
18
32
V
Operating junction temperature
–40
140
°C
Input voltage, IN, IN+, IN-, IN1, IN2
–5
25
V
Enable, EN
–5
25
V
8.4 Thermal Information
UCC27533,
UCC27531,
UCC27531
UCC27536,
UCC27538
UCC27537
THERMAL METRIC(1)
UNIT
DBV
DBV
SOIC
5 PINS
6 PINS
8 PINS
RθJA
Junction-to-ambient thermal resistance(2)
178.3
178.3
129.9
RθJC(top)
Junction-to-case (top) thermal resistance(3)
109.7
109.7
79.9
RθJB
Junction-to-board thermal resistance(4)
28.3
28.3
68.1
°C/W
ψJT
Junction-to-top characterization parameter(5)
14.7
14.7
22.7
ψJB
Junction-to-board characterization parameter(6)
27.8
27.8
69.8
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
(2)
The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3)
The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4)
The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5)
The junction-to-top characterization parameter,
ψJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining RθJA, using a procedure described in JESD51-2a (sections 6 and 7).
(6)
The junction-to-board characterization parameter,
ψJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining RθJA, using a procedure described in JESD51-2a (sections 6 and 7).
8.5 Electrical Characteristics
Unless otherwise noted, VDD = 18 V, TA = TJ = –40°C to 140°C, 1-µF capacitor from VDD to GND, f = 100 kHz. Currents are
positive into, negative out of the specified terminal. OUTH and OUTL are tied together for UCC27531/8. Typical condition
specifications are at 25°C.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
BIAS CURRENTS
VDD = 7.0, IN, EN=VDD
100
200
300
IDDoff
Start-up current (UCC25731)
μA
IN, EN = GND
100
217
300
VDD = 7.0, IN+ = GND, IN- = VDD
100
200
300
IDDoff
Start-up current (UCC27533)
μA
IN+ = VDD, IN- = GND
100
217
300
VDD = 7.0, IN- = GND, EN = VDD
100
217
300
IDDoff
Start-up current (UCC27536)
μA
IN- = VDD, EN = GND
100
217
300
VDD =7.0, IN+, EN = VDD
100
200
300
IDDoff
Start-up current (UCC27537)
μA
IN+, EN = GND
100
217
300
VDD = 7.0, IN1, IN2=VDD
100
200
300
IDDoff
Start-up Current (UCC27538)
μA
IN1, IN2=GND
100
200
300
UNDERVOLTAGE LOCKOUT (UVLO)
VON
Supply start threshold
8
8.9
9.8
V
Minimum operating voltage
VOFF
7.3
8.2
9.1
V
after supply start
VDD_H
Supply voltage hysteresis
0.7
V
Copyright © 2012–2015, Texas Instruments Incorporated
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Product Folder Links: UCC27531 UCC27533 UCC27536 UCC27537 UCC27538


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