SA828

8

SA828 PROGRAMMING EXAMPLE

The following example assumes that a master clock of

12·288 MHz is used (12·288 MHz crystals are readily available).

This clock frequency will allow a maximum carrier frequency of

24 kHz and a maximum power frequency of 4 kHz.

Initialisation Register Programming Example

A power waveform range of up to 250Hz is required with a

carrier frequency of 6kHz, a pulse deletion time of 10

µs and an

underlap of 5

µs.

1. Setting the carrier frequency

The carrier frequency should be set first as the power

frequency, pulse deletion time and pulse delay time are all

defined relative to the carrier frequency.

We must calculate the value of

n that will give the required

carrier frequency:

From Table 4,

n = 4 corresponds to a 3-bit CFS word of

010 in temporary register R1.

2. Setting the power frequency range

We must calculate the value of

m that will give the required

power frequency:

From Table 5,

m = 16 corresponds to a 3-bit FRS word of

100 in temporary register R1.

3. Setting the pulse delay time

As the pulse delay time affects the actual minimum pulse width

seen at the PWM outputs, it is sensible to set the pulse delay time

before the pulse deletion time, so that the effect of the pulse delay

time can be allowed for when setting the pulse deletion time.

⇒ n =

=

= 4

AMPLITUDE

SELECT WORD

Fig.14 Temporary register R2

Amplitude selection

The power waveform amplitude is determined by scaling

the amplitude of the waveform samples stored in the ROM by

the value of the 8-bit amplitude select word (AMP).

The percentage amplitude control is given by:

where

A = decimal value of AMP.

POWER-UP C0NDITIONS

All bits in both the Initialisation and Control registers power-

up in an unidentified state. Holding RST low or using the SET

TRIP input will ensure that the PWM outputs remain inactive

(i.e., low) until the device is initialised.

Power Amplitude,

x 100%

k

512 x

x

m

⇒ m =

=

= 16

384

250 x 384

A

255

k

512 x

n

However, the value of

pdy must be an integer. As the

purpose of the pulse delay is to prevent ‘shoot-through’ (where

both top and bottom arms of the inverter are on simultaneously),

it is sensible to round the pulse delay time up to a higher, rather

than a lower figure.

Thus, if we assign the value 16 to

pdy this gives a delay time

of 5·2

µs. From Table 6, pdy = 16 corresponds to a 6-bit PDY

word of 110000 in temporary register R2.

4. Setting the pulse deletion time

In setting the pulse deletion time (i.e., the minimum pulse

width) account must be taken of the pulse delay time, as the

actual minimum pulse width seen at the PWM outputs is equal

to

Therefore, the value of the pulse deletion time must, in this

instance, be set 5·2

µs longer than the minimum pulse length

required

Minimum pulse length required = 10

µs

Now,

⇒ pdt = f

Again,

pdt must be an integer and so must be either rounded

up or down – the choice of which will depend on the application.

Assuming we choose in this case the value 46 for

pdt, this gives

a value of

– 5·2

µs = 9·8µs.

From Table 7,

pdt = 46 corresponds to a value of PDT, the

7-bit word in temporary register R0 of 1010010.

The data which must be programmed into the three temporary

registers R0, R1 and R2 (for transfer into the initialisation

register) in order to achieve the parameters in the example

given, is shown in Fig. 15.

Fig. 15

1

1

0

1

0

0

1

0

CR

Temporary Register R0

1

0

0

X

X

0

1

0

Temporary Register R1

X

X

X

X

1

1

0

0

0

0

Temporary Register R2

X

X

We must calculate the value of

pdy that will give the required

pulse delay time:

⇒ pdy = t

pdy

pdt