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MT9076AB Datasheet(PDF) 8 Page - Mitel Networks Corporation |
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MT9076AB Datasheet(HTML) 8 Page - Mitel Networks Corporation |
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8 / 160 page  MT9076 Preliminary Information 8 Access to the Maintenance Channel The T1 ESF Facility Data Link (FDL) bits can be accessed in the following three ways: Through the data link pins TxDL, RxDL, RxDLC and TxDLC; through internal registers for Bit Oriented Messages; through an embedded HDLC. In E1 mode, the Sa bits (bits 4-8 of the non-frame alignment signal) can be accessed in four ways: Through data link pins TxDL, RxDL, RxDLC and TxDLC, through single byte transmit and receive registers; through five byte transmit and receive national bit buffers; through an embedded HDLC. Robbed Bit Signaling/Channel Associated Signaling Robbed bit signaling and channel associated signaling information can be accessed two ways: Via the microport; via the CSTi and CSTo pins. Signaling information is frozen upon loss of multiframe alignment. In T1 mode, the MT9076 supports AB and ABCD robbed bit signaling. Robbed bit signaling can be enabled on a channel by channel basis. In E1 mode the MT9076 supports Channel Associated Signaling (CAS) multiframing. HDLCs The MT9076 provides three embedded HDLCs with 128 byte deep transmit and receive FIFOs. In T1 mode, the embedded HDLCs can be assigned to any channel and can operate at 56 kbit/s or 64 kbit/s. In T1 ESF mode, HDLCO can be assigned to the 4 kbit/s FDL. In E1 mode, the embedded HDLCs can be assigned to any timeslot and can operate at 64kbit/s. HDLCO can be assigned to timeslot 0 Sa bits (bits 4-8 of the non-frame alignment signal) and can operate at 4,8,12,16 or 20kbit/s. Performance Monitoring and Debugging The MT9076 has a comprehensive suite of performance monitoring and debugging features. These include error counters, loopbacks, deliberate error insertion and a 215 –1 QRS/PRBS generator/detector. Interrupts The MT9076 provides a comprehensive set of maskable interrupts. Interrupt sources consist of synchronization status, alarm status, counter indication and overflow, timer status, slip indication, maintenance functions and receive signaling bit changes. |
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