2-293

Preliminary Information

MH89626C

Loop Electrical Characteristics

* Typical figures are at 25°C with nominal +5V supplies. For design aid only: not guaranteed and not subject to production testing.

Table 1 - Control of SLIC Functions through SD

D

I

G

I

T

A

L

Characteristics

Sym

Min

Typ*

Max

Units

Test Comments

1

Clock Frequency

C2i

2.046

2.048

2.05

MHz

2

Clock Rise Time

C2i

50

ns

3

Clock Fall Time

C2i

50

ns

4

Clock Duty Cycle

C2i

40

50

60

%

5

Chip Enable Rise Time

F1i

100

ns

6

Chip Enable Fall Time

F1i

100

ns

7

Propagation DelayClock

to Output Enable

Do

122

122

ns

ns

8

Input Setup Time

Di

25

0

ns

ns

9

Input Hold Time

Di

60

ns

Bit

Name

Description

0

SD0

When Logic ‘0’ activates relay driver 1 to apply ringing to the line

1

SD1

When logic ‘0’ activates relay driver 2. Normally used for in-test

2

SD2

When logic ‘0’ it will set the receive gain to -7.0dB

When logic ‘1’ it will set the receive gain to -3.5dB

3

SD3

When logic ‘0’ reverses the TIP and RING.

4

SD4

When logic ‘0’ activates relay driver 3. Normally used for out-test

5

SD5

The output of the serial data stream SDi, bit 5. Bit inverted

6

SD6

The output of the serial data stream SDi, bit 6. Bit inverted

7

SD7

The output of the serial data stream SDi, bit 7. Bit inverted