NCP1855 datasheet(7/26 Pages) ONSEMI

Part #	NCP1855

Description	Fully Integrated Li-Ion Switching Battery Charger

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Manufacturer	ONSEMI [ON Semiconductor]

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NCP1855

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7

Table 4. ELECTRICAL CHARACTERISTICS

Min & Max Limits apply for TA between −40°C to +85°C and TJ up to +125°C for VIN between 3.9 V to 7 V (Unless otherwise noted).

Typical values are referenced to TA = + 25°C and VIN = 5 V (Unless otherwise noted).

Symbol

Unit

Max

Typ

Min

Conditions

Parameter

JUNCTION THERMAL MANAGEMENT

TSD

Thermal shutdown

Rising

125

140

150

°C

Falling

115

°C

TH2

Hot temp threshold 2

Relative to TSD

−7

°C

TH1

Hot temp threshold 1

Relative to TSD

−11

°C

TWARN

Thermal warning

Relative to TSD

−15

°C

BUCK CONVERTER

FSWCHG

Switching Frequency

−

1.5

−

MHz

Switching Frequency Accuracy

−10

+10

%

TDTYC

Max Duty Cycle

Average

99.5

%

IPKMAX

Maximum peak inductor current

3

A

RONLS

Low side Buck MOSFET

RDSON (Q3)

Measured between PGND and SW, VIN = 5 V

−

70

110

m

W

RONHS

High side Buck MOSFET

RDSON (Q2)

Measured between CAP and SW, VIN = 5 V

−

55

85

m

W

PROTECTED TRANSCEIVER SUPPLY

VTRANS

Voltage on TRANS pin

VIN ≥ 5 V

5

5.5

V

ITRMAX

TRANS current capability

50

mA

ITROCP

Short circuit protection

150

mA

TIMING

TWD

Watchdog timer

32

s

TUSB

USB timer

2048

s

TCHG1

Charge timer

Safe−charge or pre−charge or weak−safe or

weak−charge state.

3

h

TCHG2

CC state

1

h

CV state

TIMER_SEL = 0 (default)

2

h

TIMER_SEL = 1

1

h

TWU

Wake−up timer

64

s

TST

Charger state timer,

Minimum transition time from

states to states

From Weak−Charge to Full−Charge State

32

s

From wait−state to safe−charge and from

weak−wait to weak−safe

127

ms

All others state

16

ms

TVRCHR

Deglitch time for end of charge

voltage detection

VBAT rising

15

ms

VBAT falling

127

ms

TINDET

Deglitch time for input voltage

detection

VIN rising

15

ms

TDGS1

Deglitch time for signal

crossing IEOC, VPRE, VSAFE,

VCHGDET thresholds

Rising and falling edge

15

ms

TDGS2

Deglitch time for signal

crossing VFET, VBUSUV,

VBUSOV thresholds

Rising and falling edge

1

ms

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