LC877917A

No.A1840-4/29

Interrupts: 21 sources, 10 vectors

(1) Three priority (Low, high and highest) multiple interrupts are supported. During interrupt handling, an equal or

lower priority interrupt request is postponed.

(2) If interrupt requests to two or more vector addresses occur at once, the higher priority interrupt takes precedence.

In the case of equal priority levels, the vector with the lowest address takes precedence.

No.

Vector Address

Level

Interrupt Source

1

00003H

X or L

INT0

2

0000BH

X or L

INT1

3

00013H

H or L

INT2/T0L

4

0001BH

H or L

INT3/Base timer/RTC

5

00023H

H or L

T0H

6

0002BH

H or L

T1L/T1H

7

00033H

H or L

SIO0/UART1-receive

8

0003BH

H or L

SIO1/UART-send

9

00043H

H or L

ADC/T6/T7/SPI

10

0004BH

H or L

Port 0/T4/T5

• Priority levels X > H > L

• For equal priority levels, vector with lowest address takes precedence

Subroutine Stack Levels: 256 levels max. Stack is located in RAM.

High-speed Multiplication/Division Instructions

• 16 bits × 8 bits

(5 tCYC execution time)

• 24 bits × 16 bits

(12 tCYC execution time)

• 16 bits ÷ 8 bits

(8 tCYC execution time)

• 24 bits ÷ 16 bits

(12 tCYC execution time)

Oscillation Circuits

• On-chip fast RC oscillation (Typical: 500kHz) for system clock use.

• On-chip slow RC oscillation (Typical: 50kHz) for system clock use.

• CF oscillation (4MHz) for system clock use. (Rf built in, Rd external)

• Crystal oscillation (32.768kHz) low speed system clock use. (Rf built in)

• Frequency variable RC oscillation circuit (internal): For system clock.

(1) Adjustable in ±4% (typ.) step from a selected center frequency.

(2) Measures oscillation clock using a input signal from XT1 as a reference.

System Clock Divider

• Low power consumption operation is available.

• Minimum instruction cycle time (750ns, 1.5μs, 3.0μs, 6.0μs, 12μs, 24μs, 48μs, 96μs, 192μs can be switched by

program. (when using 4MHz main clock)

System Clock Output

• The system clock output can transmitted from P04.