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KAF-0261 Datasheet(PDF) 4 Page - ON Semiconductor |
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KAF-0261 Datasheet(HTML) 4 Page - ON Semiconductor |
4 / 15 page KAF−0261 http://onsemi.com 4 Image Acquisition An image is acquired when incident light, in the form of photons, falls on the array of pixels in the vertical CCD register and creates electron−hole pairs (or simply electrons) within the silicon substrate. This charge is collected locally by the formation of potential wells created at each pixel site by induced voltages on the vertical register clock lines ( fV1, fV2). These same clock lines are used to implement the transport mechanism as well. The amount of charge collected at each pixel is linearly dependent on light level and exposure time and non−linearly dependent on wavelength until the potential well capacity is exceeded. At this point charge will ‘bloom’ into vertically adjacent pixels. Charge Transport Integrated charge is transported to the output in a two−step process. Rows of charge are first shifted line by line into the horizontal CCD. ‘Lines’ of charge are then shifted to the output pixel by pixel. The timing diagram illustrated in Figure 7 illustrates how the integration of charge is performed with fV1 and fV2 held low. Transfer to the horizontal CCD begins when fV1 is brought high, causing charge from the fV1 and fV2 gates to combine under the fV1 gate. The fV1 and fV2 gates are now reversed in polarity, causing the charge packets to ‘spill’ forward under the fV2 gate of the next pixel. The falling edge of fV2 also transfers the first line of charge into the horizontal CCD. A second phase transition places the charge packets under the fV1 electrode of the next pixel. The sequence completes when fV1 is brought low. Clocking of the vertical register in this way is known as accumulation mode clocking. Next, the horizontal CCD reads out the first line of charge using traditional complementary clocking (using fH1 and fH2 pins) as shown. The falling edge of fH2 forces a charge packet over the output gate (OG) onto one of the output nodes (floating diffusion) which is buffered by the output amplifier. The cycle repeats until all lines are read. |
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