PVIN2

BUCK 2

EN

VFB

COMP

CLK

V7V

VIN

BST

LX

PGND

BST2

LX

2

PGND2

PVIN1

BST1

LX 1

PGND1

BUCK 1

EN

COMP

VFB

CLK

V7V

VIN

BST

LX

PGND

I

2

C

ADDR

SDA

SCL

OSC / Phase Shift

V7V LDO

Bias, BG,

LDOs

V7V

iENx

COMP2

FB1

COMP1

FB2

V ,

I

4.5 V to approximately 1.8 V

V

I

en_buck1

en_buck2

7

2

Power

Good

AGND

vfb1

vfb2

DVCC

I2C Bus

VIN

10

9

7

15

16

25

23

13,14

20,21

19

12,13

31

32

3,

4

28,

29

30

5,6

Over

Temperature

en_buck1

iEN1

en_buck2

iEN2

ENS=BGOK & OTOK & LDOOK

EN1

EN2

1

2

7

SS

27

SS

22

ROSC

24

V7V

MUX

VOUT2

7- BIT

I C Reg.

2

0.68 V – 1.95 V

max. I

= 3.5 A

O1

18

17

MUX

VOUT1

EN1

EN2

MODE

MODE

MODE

8

SS2

26

SS1

0.68 V – 1.95 V

max. I

= 3.5 A

O1

I C Reg.

2

7- BIT

I C Reg.

2

I C Reg.

2

TPS563900

SLVSCC7 – DECEMBER 2013

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

FUNCTIONAL BLOCK DIAGRAM

2

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