continued

ValueRAM

Kingston.com

Document No. VALUERAM0530-001.A00 12/19/06 Page 6

Continued >>

SPD Bus Interface Signals

5

1

t

u

p

n

I

k

c

o

l

C

)

D

P

S

(

t

c

e

t

e

D

e

c

n

e

s

e

r

P

l

a

ir

e

S

L

C

S

SDA

SPD Data Input / Output

1

3

B

M

A

e

h

t

n

i

r

e

b

m

u

n

M

M

I

D

e

h

t

t

c

e

l

e

s

o

t

d

e

s

u

o

s

l

a

,

s

t

u

p

n

I

s

s

e

r

d

d

A

D

P

S

]

0

:

2

[

A

S

Miscellaneous Signals

163

PLLTSTOP

LL Clock Observability Output

1

1

.

C

C

V

o

t

r

e

tl

if

s

s

a

p

w

o

l

h

ti

w

d

e

i

T

.

L

L

P

e

h

t

r

o

f

C

C

V

g

o

l

a

n

A

L

L

P

A

C

C

V

VSSAPLLA

nalog VSS for the PLL. Tied to ground on the AMB die. Do not tie to ground on the DIMM.1

TEST_pin#

Leave floating on the DIMM

6

TESTLO_pin#

5

1

”.

M

M

I

D

n

o

r

e

ff

u

b

“

s

a

y

ti

l

a

n

o

it

c

n

u

f

t

e

s

o

t

d

n

u

o

r

g

o

t

e

i

T

C

N

U

F

B

RESET

AMB reset signal

1

NC

No connect. Many NC are connected to VDD on the DIMM, to lower the impedance of the VDD power

islands.

129

RFUR

eserved for Future Use

18

Power/Ground Signals

213

AMB Core Power (1.5 Volt)

24

8

)t

l

o

V

5

.

1

(

r

e

w

o

P

O

/I

l

e

n

n

a

h

C

B

M

A

4

2

)t

l

o

V

8

.

1

(

r

e

w

o

P

O

/I

M

A

R

D

B

M

A

SPD Power (3.3 Volt)

1

Ground

156

5

5

6

l

a

t

o

T

1. System Clock Signals SCK and SCK switch at one half the DRAM CK/CK frequency.

2. TESTLO_AB20 and TESTLO_AC20 should be configured for debug purposes on prototype DIMMs: each pin should have a zero

ohm resistor pulldown to ground, and an unpopulated resistor pullup to VCC. These resistors can be replaced on production

DIMMs with a direct connection to ground.

Advanced Memory Buffer Pin Description: