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NCP6324 Datasheet(PDF) 4 Page - ON Semiconductor

Part # NCP6324
Description  3MHz, 2A Synchronous Buck Converter
Download  14 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NCP6324 Datasheet(HTML) 4 Page - ON Semiconductor

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NCP6324, NCV6324
www.onsemi.com
4
ELECTRICAL CHARACTERISTICS (VIN = 3.6 V, VOUT = 1.8 V, L = 1 mH, C = 10 mF, typical values are referenced to TJ = 25°C, Min
and Max values are referenced to TJ up to 125°C, unless other noted.)
Symbol
Characteristics
Test Conditions
Min
Typ
Max
Unit
SUPPLY VOLTAGE
VIN
Input Voltage VIN Range
(Note 10)
2.5
5.5
V
SUPPLY CURRENT
IQ
VIN Quiescent Supply Current
EN high, no load, no switching, PFM Mode
EN high, no load, Forced PWM Mode
30
5.7
mA
mA
ISD
VIN Shutdown Current
EN low (Note 9 for NCP6324)
1
mA
OUTPUT VOLTAGE
VOUT
Output Voltage Range
(Note 7)
0.6
VIN
V
VFB
FB Voltage
PWM Mode
594
600
606
mV
FB Voltage in Load Regulation
VIN = 3.6 V, IOUT from 200 mA to IOUTMAX,
PWM mode (Note 7)
−0.5
%/A
FB Voltage in Line Regulation
IOUT = 200 mA, VIN from MAX (VNOM +
0.5 V, 2.5 V) to 5.5 V, PWM mode (Note 7)
0
%/V
DMAX
Maximum Duty Cycle
(Note 7)
100
%
OUTPUT CURRENT
IOUTMAX
Output Current Capability
(Note 7)
2.0
A
ILIMP
Output Peak Current Limit P−Channel
2.3
2.8
3.3
A
ILIMN
Output Peak Current Limit N−Channel
0.9
A
VOLTAGE MONITOR
VINUV−
VIN UVLO Falling Threshold
2.4
V
VINHYS
VIN UVLO Hysteresis
60
140
200
mV
VPGL
Power Good Low Threshold
VOUT falls down to cross the threshold
(percentage of FB voltage) (Note 8)
87
90
92
%
VPGHYS
Power Good Hysteresis
VOUT rises up to cross the threshold
(percentage of Power Good Low Threshold
(VPGL) voltage) (Note 8)
0
5
7
%
TdPGH1
Power Good High Delay in Start Up
From EN rising edge to PG going high.
(Note 8)
1.15
ms
TdPGL1
Power Good Low Delay in Shut Down
From EN falling edge to PG going low.
(Notes 7 and 8)
8
ms
TdPGH
Power Good High Delay in Regulation
From VFB going higher than 95% nominal
level to PG going high.
Not for the first time in start up. (Notes 7
and 8)
5
ms
TdPGL
Power Good Low Delay in Regulation
From VFB going lower than 90% nominal
level to PG going low. (Notes 7 and 8)
8
ms
VPG_L
Power Good Pin Low Voltage
Voltage at PG pin with 5 mA sink current
(Note 8)
0.3
V
PG_LK
Power Good Pin Leakage Current
3.6 V at PG pin when power good valid
(Note 8)
100
nA
INTEGRATED MOSFETs
RON_H
High−Side MOSFET ON Resistance
VIN = 3.6 V (Note 9 for NCP6324)
VIN = 5 V (Note 9 for NCP6324)
160
130
200
m
W
RON_L
Low−Side MOSFET ON Resistance
VIN = 3.6 V (Note 9 for NCP6324)
VIN = 5 V (Note 9 for NCP6324)
110
100
140
m
W
7. Guaranteed by design, not tested in production.
8. Power Good function is for NCx6324B devices only.
9. Maximum value applies for TJ = 85°C.
10. Operation above 5.5 V input voltage for extended periods may affect device reliability. At the first power−up, input voltage must be > 2.6 V.


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