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A29800A Datasheet(PDF) 11 Page - AMIC Technology |
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A29800A Datasheet(HTML) 11 Page - AMIC Technology |
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11 / 40 page  A29800A Series (August, 2014, Version 1.3) 10 AMIC Technology, Corp. Sector Protection/Unprotection The hardware sector protection feature disables both program and erase operations in any sector. The hardware sector unprotection feature re-enables both program and erase operations in previously protected sectors. It is possible to determine whether a sector is protected or unprotected. See “Autoselect Mode” for details. Sector protection / unprotection can be implemented via two methods. The primary method requires VID on the RESETpin only, and can be implemented either in-system or via programming equipment. Figure 2 shows the algorithm and the Sector Protect / Unprotect Timing Diagram illustrates the timing waveforms for this feature. This method uses standard microprocessor bus cycle timing. For sector unprotect, all unprotected sectors must first be protected prior to the first sector unprotect write cycle. The alternate method must be implemented using programming equipment. The procedure requires a high voltage (VID) on address pin A9 and the control pins. The device is shipped with all sectors unprotected. It is possible to determine whether a sector is protected or unprotected. See "Autoselect Mode" for details. Hardware Data Protection The requirement of command unlocking sequence for programming or erasing provides data protection against inadvertent writes (refer to the Command Definitions table). In addition, the following hardware data protection measures prevent accidental erasure or programming, which might otherwise be caused by spurious system level signals during VCC power-up transitions, or from system noise. The device is powered up to read array data to avoid accidentally writing data to the array. Low VCC Write Inhibit When VCC is lower than VLKO, the device does not accept any write cycles. This protects data during VCC power up and power down. The command register and all internal program/erase circuits are disabled, and the device resets. Subsequent writes are ignored until VCC is greater than VLKO. The system must provide the proper signals to the control pins to prevent unintentional writes when VCC is greater than VLKO. Write Pulse "Glitch" Protection Noise pulses of less than 5ns (typical) on OE , CE or WE do not initiate a write cycle. Logical Inhibit Write cycles are inhibited by holding any one of OE =VIL, CE = VIH or WE = VIH. To initiate a write cycle, CE and WE must be a logical zero while OE is a logical one. Power-Up Write Inhibit If WE = CE = VIL and OE = VIH during power up, the device does not accept commands on the rising edge of WE . The internal state machine is automatically reset to reading array data on the initial power-up. Temporary Sector Unprotect This feature allows temporary unprotection of previous protected sectors to change data in-system. The Sector Unprotect mode is activated by setting the RESET pin to VID. During this mode, formerly protected sectors can be programmed or erased by selecting the sector addresses. Once VID is removed from the RESET pin, all the previously protected sectors are protected again. Figure 1 shows the algorithm, and the Temporary Sector Unprotect diagram shows the timing waveforms, for this feature. START RESET = VID (Note 1) Perform Erase or Program Operations RESET = VIH Temporary Sector Unprotect Completed (Note 2) Notes: 1. All protected sectors unprotected. 2. All previously protected sectors are protected once again. Figure 1. Temporary Sector Unprotect Operation |
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