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KAI-10100 Datasheet(PDF) 9 Page - ON Semiconductor

Part # KAI-10100
Description  INTERLINE CCD IMAGE SENSOR
Download  51 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

KAI-10100 Datasheet(HTML) 9 Page - ON Semiconductor

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KAI-10100 Image Sensor
www.truesenseimaging.com
Revision 1.1 PS-0027 Pg 9
HORIZONTAL REGISTER
Output Structure
ESD
RF3
RF4
RF2
RF1
RG
(Reset)
RD
RDen
floating diffusion
VOUT
VDD
SUB
SUB15
16k
4k
1.5k
1.5k
0.75k
18k
7.5k
10k
100k
Figure 2: Output Architecture (each output)
Charge packets contained in the horizontal register are dumped pixel by pixel onto the floating diffusion (fd) output
node whose potential varies linearly with the quantity of charge in each packet. The amount of potential charge is
determined by the expression ΔVfd=ΔQ/Cfd. A three-stage source-follower amplifier is used to buffer this signal
voltage off chip with slightly less than unity gain. The translation from the charge domain to the voltage domain is
quantified by the output sensitivity or charge to voltage conversion in terms of microvolts per electron (μV/e
-). The
dual parallel horizontal CCDs are presented a new line during the horizontal retrace period. H1, H3, H4 and H4L are
held low while the vertical registers transfer the next line to the horizontal. H2 and HTG are held high. HTG shifts low
then H1 taken high.
This shifts the charge in the Horizontal Registers forward one phase so the charge packets in the A and B registers are
now aligned. Both horizontal CCD’s then transport each line, pixel by pixel, to the A and B output structures by clocking
the H1 and H2 pins alternately with the H3 and H4 pins in a complementary fashion. A separate connection to the last
H4 phase (H4L) is provided to improve the transfer speed of charge to the floating diffusion. On each falling edge of
H4L a new charge packet is dumped onto a floating diffusion and sensed by the output amplifier. After the signal has
been sampled off chip, the reset clock (RG) removes the charge from the floating diffusion and resets its potential to
the reset drain voltage (RD), which is set on-chip.
Internal connections


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