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NCP81111MNDFTXG Datasheet(PDF) 7 Page - ON Semiconductor |
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NCP81111MNDFTXG Datasheet(HTML) 7 Page - ON Semiconductor |
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7 / 28 page  NCP81111 www.onsemi.com 7 ELECTRICAL CHARACTERISTICS Unless otherwise stated: −10 °C < TA < 100°C; 4.75 V < VCC < 5.25 V; CVCC = 0.1 mF Parameter Unit Max Typ Min Test Conditions DRVON Output High Voltage Sourcing 500 mA 3.5 V Output Low Voltage Sinking 500 mA 0.1 V Rise/Fall Time CL (PCB) = 20 pF, DVo = 10% to 90% 10 ns Internal Pull Down Resistance EN = Low 70 k W IOUT MONITOR Analog Gain Accuracy −3% +3% Analog Gain Range 16 1024 Analog Gain Step Size Binary weigh ted Analog IOUT Offset Accuracy Gain = 64, CSx sum = 40 mV, Digital Gain = 1 3 LSB Digital Gain Step Size Digital gain is 2.8 format 0.4% Digital Gain Range 0.004 4 ADC Voltage Range 0 2.56 V ADC Total Unadjusted Error (TUE) Max % error of the ideal value −1 +1 % ADC Differential Nonlinearity (DNL) Highest 8−bits 1 LSB ADC Conversion Time 10 ms ADC Conversion Rate Per Channel 33 kHz INTERNAL RAMP Ramp Slope Accuracy −5 5 % Ramp Reset Voltage Step Size 8 mV Maximum Ramp Reset Step 486 512 538 mV Ramp Slope Maximum Single Phase Mode 4000 mV/ ms Ramp Slope Minimum Single Phase Mode 5.6 mV/ ms Ramp Slope Step Size Single Phase Mode Typical 5.3 5.6 5.88 mV/ ms OUTPUT OVER VOLTAGE & UNDER VOLTAGE PROTECTION (OVP & UVP) Over Voltage Set Point Accuracy Threshold is programmable −20 20 mV Over Voltage Max Capability 3 V Over Voltage Delay VSP(A) rising to PWMx low 400 ns Under Voltage Threshold Below DAC−DROOP VSP(A) falling 415 450 475 mV Under Voltage Hysteresis VSP(A) rising 100 mV Under Voltage Delay 150 ns DROOP Gain Accuracy Guaranteed by Design −2 +2 % Programmable Gain Range CSx sum to Diffout 0,0.3 16.5 Gain Step Size 1.2 % Offset Accuracy CSx input referred from 1.0 V to 2.0 V −2.5 2.5 mV Common Mode Rejection CSx input referred from 1.0 V to 2.0 V 60 80 db OVERCURRENT PROTECTION ILIM Threshold Accuracy Sum of CSx inputs −3.5 3.5 mV |
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