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MT9V034C12STM-TR Datasheet(PDF) 6 Page - ON Semiconductor |
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MT9V034C12STM-TR Datasheet(HTML) 6 Page - ON Semiconductor |
6 / 62 page MT9V034_DS Rev.G Pub. 4/15 EN 6 ©Semiconductor Components Industries, LLC,2015. MT9V034: 1/3-Inch Wide-VGA Digital Image Sensor General Description General Description The MT9V034 is a 1/3-inch wide-VGA format CMOS active-pixel digital image sensor with global shutter and high dynamic range (HDR) operation. The sensor has specifi- cally been designed to support the demanding interior and exterior surveillance imaging needs, which makes this part ideal for a wide variety of imaging applications in real-world environments. This wide-VGA CMOS image sensor features ON Semiconductor’s breakthrough low-noise CMOS imaging technology that achieves CCD image quality (based on signal-to-noise ratio and low-light sensitivity) while maintaining the inherent size, cost, and integration advantages of CMOS. The active imaging pixel array is 752H x 480V. It incorporates sophisticated camera func- tions on-chip—such as binning 2 x 2 and 4 x 4, to improve sensitivity when operating in smaller resolutions—as well as windowing, column and row mirroring. It is program- mable through a simple two-wire serial interface. The MT9V034 can be operated in its default mode or be programmed for frame size, exposure, gain setting, and other parameters. The default mode outputs a wide-VGA-size image at 60 frames per second (fps). An on-chip analog-to-digital converter (ADC) provides 10 bits per pixel. A 12-bit resolu- tion companded for 10 bits for small signals can be alternatively enabled, allowing more accurate digitization for darker areas in the image. In addition to a traditional, parallel logic output the MT9V034 also features a serial low- voltage differential signaling (LVDS) output. The sensor can be operated in a stereo- camera, and the sensor, designated as a stereo-master, is able to merge the data from itself and the stereo-slave sensor into one serial LVDS stream. The sensor is designed to operate in a wide temperature range (–30°C to +70°C). Figure 1: Block Diagram Parallel Video Data Out Serial Register I/O Control Register ADCs Active-Pixel Sensor (APS) Array 752H x 480V Timing and Control Digital Processing Analog Processing Serial Video LVDS Out Slave Video LVDS In (for stereo applications only) |
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