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MT9M034I12STM-DRBR Datasheet(PDF) 6 Page - ON Semiconductor

Part # MT9M034I12STM-DRBR
Description  Digital Image Sensor
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MT9M034I12STM-DRBR Datasheet(HTML) 6 Page - ON Semiconductor

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MT9M034_DS Rev. G Pub. 4/15 EN
6
©Semiconductor Components Industries, LLC,2015.
MT9M034: 1/3-Inch CMOS Digital Image Sensor
General Description
General Description
The ON Semiconductor MT9M034 can be operated in its default mode or programmed
for frame size, exposure, gain, and other parameters. The default mode output is a 960p-
resolution image at 45 frames per second (fps). In linear mode, it outputs 12-bit raw
data. In high dynamic range mode, it outputs 12-bit compressed data using parallel
output. The device may be operated in video (master) mode or in single frame trigger
mode.
FRAME_VALID and LINE_VALID signals are output on dedicated pins, along with a
synchronized pixel clock in parallel mode.
The MT9M034 includes additional features to allow application-specific tuning:
windowing and offset, adjustable auto-exposure control, auto black level correction, and
on-board temperature sensor. Optional register information and histogram statistic
information can be embedded in first and last 2 lines of the image frame.
The sensor is designed to operate in a wide temperature range (–30°C to +70°C).
Functional Overview
The MT9M034 is a progressive-scan sensor that generates a stream of pixel data at a
constant frame rate. It uses an on-chip, phase-locked loop (PLL) that can be optionally
enabled to generate all internal clocks from a single master input clock running between
6 and 50 MHz The maximum output pixel rate is 74.25 Mp/s, corresponding to a clock
rate of 74.25 MHz. Figure 1 shows a block diagram of the sensor.
Figure 1:
Block Diagram
User interaction with the sensor is through the two-wire serial bus, which communi-
cates with the array control, analog signal chain, and digital signal chain. The core of the
sensor is a 1.2 Mp Active- Pixel Sensor array. The timing and control circuitry sequences
through the rows of the array, resetting and then reading each row in turn. In the time
interval between resetting a row and reading that row, the pixels in the row integrate
incident light. The exposure is controlled by varying the time interval between reset and
readout. Once a row has been read, the data from the columns is sequenced through an
Control Registers
Active Pixel Sensor
(APS)
Array
PLL
Memory
OTPM
Timing and Control
(Sequencer)
Analog Processing and
A/D Conversion
Auto Exposure
and Stats Engine
Pixel Data Path
(Signal Processing)
External
Clock
Parallel
Output
Two-Wire
Serial
Interface
Trigger
Power


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